MT45W1MW16BAFB-706 WT Micron Technology Inc, MT45W1MW16BAFB-706 WT Datasheet - Page 10

IC PSRAM 16MBIT 70NS 54FBGA

MT45W1MW16BAFB-706 WT

Manufacturer Part Number
MT45W1MW16BAFB-706 WT
Description
IC PSRAM 16MBIT 70NS 54FBGA
Manufacturer
Micron Technology Inc

Specifications of MT45W1MW16BAFB-706 WT

Format - Memory
RAM
Memory Type
PSRAM (Page)
Memory Size
16M (1M x 16)
Speed
70ns
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.95 V
Operating Temperature
-30°C ~ 85°C
Package / Case
54-VFBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Figure 5:
Figure 6:
Page Mode READ Operation
PDF: 09005aef80ec6f63/Source: 09005aef80ec6f46
Burst CellularRAM_32__2.fm - Rev. E 10/05 EN
READ Operation (ADV = LOW)
WRITE Operation (ADV = LOW)
Note:
ADDRESS
ADDRESS
Page mode is a performance-enhancing extension to the legacy asynchronous READ
operation. In page-mode-capable products, an initial asynchronous read access is per-
formed, then adjacent addresses can be read quickly by simply changing the low-order
address. Addresses A[3:0] are used to determine the members of the 16-address Cellular-
RAM page. Any change in addresses A[4] or higher will initiate a new
Figure 7 shows the timing for a page mode access. Page mode takes advantage of the fact
that adjacent addresses can be read in a shorter period of time than random addresses.
WRITE operations do not include comparable page mode functionality.
During asynchronous page mode operation, the CLK input must be held static LOW. CE#
must be driven HIGH upon completion of a page mode access. WAIT will be driven
while the device is enabled and its state should be ignored. Page mode is enabled by set-
ting RCR[7] to HIGH. ADV must be driven LOW during all page mode read accesses.
The CE# LOW time is limited by refresh considerations. CE# must not stay LOW longer
than
2 Meg x 16, 1 Meg x 16 Async/Page/Burst CellularRAM 1.0 Memory
LB#/UB#
LB#/UB#
DATA
DATA
WE#
OE#
WE#
CE#
ADV must remain LOW for page mode operation.
OE#
CE#
t
CEM.
t WC = WRITE Cycle Time
t RC = READ Cycle Time
ADDRESS VALID
ADDRESS VALID
<
t
10
CEM
DATA VALID
DATA VALID
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DON’T CARE
DON’T CARE
Bus Operating Modes
©2003 Micron Technology, Inc. All rights reserved.
t
AA access time.

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