MT45W1MW16BAFB-708 WT TR Micron Technology Inc, MT45W1MW16BAFB-708 WT TR Datasheet - Page 17

IC PSRAM 16MBIT 70NS 54FBGA

MT45W1MW16BAFB-708 WT TR

Manufacturer Part Number
MT45W1MW16BAFB-708 WT TR
Description
IC PSRAM 16MBIT 70NS 54FBGA
Manufacturer
Micron Technology Inc

Specifications of MT45W1MW16BAFB-708 WT TR

Format - Memory
RAM
Memory Type
PSRAM (Page)
Memory Size
16M (1M x 16)
Speed
70ns
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.95 V
Operating Temperature
-30°C ~ 85°C
Package / Case
54-VFBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Access Using CRE
Figure 13:
PDF: 09005aef80ec6f63/Source: 09005aef80ec6f46
Burst CellularRAM_32__2.fm - Rev. E 10/05 EN
(except A19)
DQ[15:0]
LB#/UB#
A[20:0]
Configuration Register WRITE in Asynchronous Mode Followed by READ ARRAY
ADV#
A19
WE#
OE#
CLK
CRE
CE#
1
Notes: 1. A[19] = LOW to load RCR; A[19] = HIGH to load BCR.
The configuration registers are loaded using either a synchronous or an asynchronous
WRITE operation when the configuration register enable (CRE) input is HIGH (see Fig-
ure 13 on page 17 and Figure 14 on page 18). When CRE is LOW, a READ or WRITE oper-
ation will access the memory array. The register values are placed on address pins
A[20:0]. In an asynchronous WRITE, the values are latched into the configuration regis-
ter on the rising edge of ADV#, CE#, or WE#, whichever occurs first; LB# and UB# are
“Don’t Care.” Access using CRE is WRITE only. The BCR is accessed when A[19] is HIGH;
the RCR is accessed when A[19] is LOW.
2 Meg x 16, 1 Meg x 16 Async/Page/Burst CellularRAM 1.0 Memory
t VPH
Select Control Register
Operation
OPCODE
t AVS
t AVS
Initiate Control Register Access
t VP
t AVH
t AVH
t CW
Write Address Bus Value
17
to Control Register
t WP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t CPH
ADDRESS
ADDRESS
Configuration Registers
©2003 Micron Technology, Inc. All rights reserved.
DATA VALID
DON’T CARE

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