IC SDRAM 128MBIT 100MHZ 54VFBGA

 

MT48V8M16LFB4-10:G

Manufacturer Part NumberMT48V8M16LFB4-10:G
DescriptionIC SDRAM 128MBIT 100MHZ 54VFBGA
ManufacturerMicron Technology Inc
MT48V8M16LFB4-10:G datasheets

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Specifications of MT48V8M16LFB4-10:G

Format - MemoryRAMMemory TypeMobile SDRAM
Memory Size128M (8Mx16)Speed100MHz
InterfaceParallelVoltage - Supply2.3 V ~ 2.7 V
Operating Temperature0°C ~ 70°CPackage / Case54-VFBGA
Lead Free Status / RoHS StatusLead free / RoHS Compliant  
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Page 27/80

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Figure 11:
Example: Meeting
CLK
COMMAND
READs
READ bursts are initiated with a READ command, as shown in Figure 12.
The starting column and bank addresses are provided with the READ command, and
auto precharge is either enabled or disabled for that burst access. If auto precharge is
enabled, the row being accessed is precharged at the completion of the burst. For the
READ commands used in the following illustrations, auto precharge is disabled.
During READ bursts, the valid data-out element from the starting column address will
be available following CL after the READ command. Each subsequent data-out element
will be valid by the next positive clock edge. Figure 13 on page 28 shows general timing
for each possible CL setting.
Figure 12:
READ Command
RAS#
CAS#
WE#
x16: A0–A8
x32: A0–A7
A9, A11
BA0,BA1
PDF: 09005aef807f4885/Source: 09005aef8071a76b
128Mbx16x32Mobile_2.fm - Rev. M 1/09 EN
t
t
RCD (MIN) When 2 <
RCD (MIN)/
T0
T1
T2
ACTIVE
NOP
NOP
t
RCD
CLK
CKE
HIGH
CS#
COLUMN
ADDRESS
ENABLE AUTO PRECHARGE
A10
DISABLE AUTO PRECHARGE
BANK
ADDRESS
DON’T CARE
27
128Mb: x16, x32 Mobile SDRAM
t
CK< 3
T3
T4
READ or
WRITE
DON’T CARE
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2001 Micron Technology, Inc. All rights reserved.
READs