M29W400BT70N6 NUMONYX, M29W400BT70N6 Datasheet
M29W400BT70N6
Specifications of M29W400BT70N6
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M29W400BT70N6 Summary of contents
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... PROGRAM/ERASE CYCLES per BLOCK 20 YEARS DATA RETENTION – Defectivity below 1 ppm/year ELECTRONIC SIGNATURE – Manufacturer Code: 0020h – Top Device Code M29W400BT: 00EEh – Bottom Device Code M29W400BB: 00EFh June 2001 Low Voltage Single Supply Flash Memory TSOP48 ( 20mm 44 Figure 1. Logic Diagram 18 A0-A17 W E ...
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... Read mode where it can be read in the same way as a ROM or EPROM. The M29W400B is fully backward compatible with the M29W400. The memory is divided into blocks that can be erased independently possible to preserve valid data while old data is erased. Each block can be protected independently to prevent accidental Program or Erase commands from modifying the memory ...
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... They allow simple connection to most micropro- cessors, often without additional logic. The memory is offered in TSOP48 (12 x 20mm), TFBGA48 (0.8mm pitch) and SO44 packages and it is supplied with all the bits erased (set to ’1’). ...
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M29W400BT, M29W400BB Table 2. Absolute Maximum Ratings Symbol Ambient Operating Temperature (Temperature Range Option Ambient Operating Temperature (Temperature Range Option 6) T Temperature Under Bias BIAS T Storage Temperature STG (2) Input or Output Voltage V IO ...
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... Byte/Word Organization Select (BYTE). The Byte/ Word Organization Select pin is used to switch be- tween the 8-bit and 16-bit Bus modes of the mem- ory. When Byte/Word Organization Select is Low the memory is in 8-bit mode, when it is High the memory is in 16-bit mode Supply Voltage ...
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... Put Disable, Standby and Automatic Standby. See Tables 5 and 6, Bus Operations, for a summary. Typically glitches of less than 5ns on Chip Enable or Write Enable are ignored by the memory and do not affect bus operations. Bus Read. Bus Read operations read from the memory cells, or specific registers in the Com- mand Interface ...
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... Read mode. The long command sequences are imposed to maximize data security. The address used for the commands changes de- pending on whether the memory is in 16-bit or 8- bit mode. See either Table depending on the configuration that is being used, for a sum- mary of the commands. ...
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... Prog ram, Unlock Bypass Program, Chip Erase, Block Erase. After these commands read the Status Register until the Program/Erase Controller completes and the memory returns to Read Mode. Add additional Blocks during Block Erase Command with additional Bus Write Operations until Timeout Bit is set. ...
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... Once the Unlock Bypass command has been is- sued the memory will only accept the Unlock By- pass Program command and the Unlock Bypass Reset command. The memory can be read Read mode. Unlock Bypass Program Command. The lock Bypass Program command can be used to program one address in memory at a time ...
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... Reading from blocks that are being erased will output the Status Register also possible to enter the Auto Select mode: the memory will behave as in the Auto Select mode on all blocks until a Read/Reset command returns the memory to Erase Suspend mode. ...
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... DQ5 at ’1’. In both cases, a succes- sive Bus Read operation will show the bit is still ’0’. One of the Erase commands must be used to set all the bits in a block or in the whole memory from ’0’ to ’1’. DQ7 ...
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... Bus Read operations from addresses within the blocks being erased. Bus Read operations to ad- dresses within blocks not being erased will output the memory cell data Read mode. After an Erase operation that causes the Error Bit to be set the Alternative Toggle Bit can be used to ...
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Table 11. AC Measurement Conditions Parameter V Supply Voltage CC Load Capacitance ( Input Rise and Fall Times Input Pulse Voltages Input and Output Timing Ref. Voltages Figure 7. AC Testing Input Output Waveform 3V 0V Table 12. ...
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M29W400BT, M29W400BB Table 13. DC Characteristics ( – Symbol Parameter I Input Leakage Current LI I Output Leakage Current LO I Supply Current (Read) CC1 I Supply Current (Standby) CC2 ...
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Table 14. Read AC Characteristics ( – Symbol Alt Parameter Address Valid to Next Address t t AVAV RC Valid t t Address Valid to Output Valid AVQV ACC Chip ...
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M29W400BT, M29W400BB Table 15. Write AC Characteristics, Write Enable Controlled ( – Symbol Alt t t Address Valid to Next Address Valid AVAV Chip Enable Low to ...
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Table 16. Write AC Characteristics, Chip Enable Controlled ( – Symbol Alt t t Address Valid to Next Address Valid AVAV Write Enable Low to Chip Enable ...
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M29W400BT, M29W400BB Table 17. Reset/Block Temporary Unprotect AC Characteristics ( – Symbol Alt (1) t PHWL RP High to Write Enable Low, Chip Enable t t PHEL RH Low, Output ...
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... DCL1-4 = Daisy Chain Level 1 for 4 Mbit parts Optio Tape & Reel Packing Devices are shipped from the factory with the memory content bits erased to ’1’. For a list of available options (Speed, Package, etc...) or for further information on any aspect of this de- vice, please contact the ST Sales Office nearest to you. ...
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M29W400BT, M29W400BB Table 20. Revision History Date Version July 1999 -01 First Issue -02 Chip Erase Max. specification added Block Erase Max. specification added Program Max. specification added 9/21/99 Chip Program Max. specification added I Typ. specification added CC1 I ...
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Table 21. TSOP48 - 48 lead Plastic Thin Small Outline 20mm, Package Mechanical Data Symbol Typ A A1 0.05 A2 0.95 B 0.17 C 0.10 D 19.80 D1 18.30 E 11.90 e 0. Figure ...
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M29W400BT, M29W400BB Table 22. TFBGA48 - ball array, 0.8 mm pitch, Package Mechanical Data millimeters Symbol Typ A A1 0.200 A2 b 0.400 0.350 D 6.000 5.900 D1 4.000 ddd E 9.000 8.900 E1 5.600 e 0.800 ...
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Figure 15. TFBGA48 Daisy Chain - Package Connections (Top view through package Figure 16. TFBGA48 Daisy Chain - PCB Connections (Top view through package) START 1 POINT ...
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M29W400BT, M29W400BB Table 23. SO44 - 44 lead Plastic Small Outline, 525 mils body width, Package Mechanical Data Symbol Typ A 2.42 A1 0. 0.10 D 28.10 E 13.20 e 1.27 H 15.90 L 0.80 3 ...
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. ...