M29W640FB70N6E NUMONYX, M29W640FB70N6E Datasheet

IC FLASH 64MBIT 70NS 48TSOP

M29W640FB70N6E

Manufacturer Part Number
M29W640FB70N6E
Description
IC FLASH 64MBIT 70NS 48TSOP
Manufacturer
NUMONYX
Series
Axcell™r
Datasheet

Specifications of M29W640FB70N6E

Format - Memory
FLASH
Memory Type
FLASH - Nor
Memory Size
64M (8Mx8, 4Mx16)
Speed
70ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TSOP
Supply Voltage Range
2.7V To 3.6V
Memory Case Style
TSOP
No. Of Pins
48
Access Time
70ns
Base Number
29
Ic Generic Number
29W640
Memory Configuration
8M X 8, 4M X 16
Interface Type
CFI, Parallel
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-5031
497-5031

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Feature summary
Table 1.
September 2008
Supply voltage
– V
– V
Asynchronous Random/Page Read
– Page Width: 4 Words
– Page Access: 25ns
– Random Access: 60ns, 70ns
Programming time
– 10μs per Byte/Word typical
– 4 Words / 8 Bytes Program
135 Memory Blocks
– 1 Boot Block and 7 Parameter Blocks,
– 127 Main Blocks, 64 KBytes each
Program/Erase Controller
– Embedded Byte/Word Program algorithms
Program/Erase Suspend and Resume
– Read from any Block during Program
– Read and Program another Block during
Unlock Bypass Program command
– Faster Production/Batch Programming
V
Temporary Block Unprotection mode
Common Flash Interface
– 64-bit Security Code
PP
Read
8 KBytes each (Top or Bottom location)
Suspend
Erase Suspend
/WP pin for Fast Program and Write Protect
CC
PP
=12 V for Fast Program (optional)
= 2.7V to 3.6V for Program, Erase,
Device Codes
Root Part Number
M29W640FT
M29W640FB
64 Mbit (8Mb x8 or 4Mb x16, Page, Boot Block)
Rev 8
Extended Memory Block
Extra block used as security block or to store
additional information
Low power consumption
– Standby and Automatic Standby
100,000 Program/Erase cycles per block
Electronic Signature
– Manufacturer Code: 0020h
ECOPACK
3V Supply Flash Memory
®
packages
TFBGA48 (ZA)
Device Code
TSOP48 (N)
12 x 20mm
22EDh
22FDh
6x8mm
M29W640FB
FBGA
M29W640FT
www.Numonyx.com
1/71
1

Related parts for M29W640FB70N6E

M29W640FB70N6E Summary of contents

Page 1

... Low power consumption – Standby and Automatic Standby 100,000 Program/Erase cycles per block Electronic Signature – Manufacturer Code: 0020h ECOPACK Rev 8 M29W640FT M29W640FB 3V Supply Flash Memory TSOP48 ( 20mm FBGA TFBGA48 (ZA) 6x8mm ® packages Device Code 22EDh 22FDh www.Numonyx.com 1/71 1 ...

Page 2

Contents 1 Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 3

Chip Erase command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 4

... Appendix B Common Flash Interface (CFI Appendix C Extended Memory Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 C.1 Factory Locked Extended Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 C.2 Customer Lockable Extended Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Appendix D Block protection D.1 Programmer technique . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 D.2 In-System technique . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 4/71 ...

Page 5

List of tables Table 1. Device Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 6

List of figures Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 7

... Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an Numonyx trademark. ECOPACK specifications are available at: www.Numonyx.com. The memory is delivered with all the bits erased (set to 1). ...

Page 8

Figure 1. Logic diagram Table 2. Signal names A0-A21 DQ0-DQ7 DQ8-DQ14 DQ15A–1 (or DQ15 BYTE / 8/ / A0-A21 W M29W640FT E ...

Page 9

Figure 2. TSOP connections A15 A14 A13 A12 A11 A10 A9 A8 A19 A20 W RP A21 V PP /WP RB A18 A17 A16 BYTE V SS DQ15A–1 DQ7 DQ14 DQ6 ...

Page 10

Figure 3. TFBGA48 connections (top view through package 10/ A17 A2 A6 A18 A21 A1 A5 A20 A19 ...

Page 11

... Figure 1: Logic connected to this device. 2.1 Address Inputs (A0-A21) The Address Inputs select the cells in the memory array to access during Bus Read operations. During Bus Write operations they control the commands sent to the Command Interface of the Program/Erase Controller. 2.2 Data Inputs/Outputs (DQ0-DQ7) The Data I/O outputs the data stored at the selected address during a Bus Read operation ...

Page 12

... Write Enable (W) The Write Enable, W, controls the Bus Write operation of the memory’s Command Interface. 2.8 V /Write Protect (V PP The V /Write Protect pin provides two functions. The V PP use an external high voltage power supply to reduce the time required for Unlock Bypass Program operations ...

Page 13

... Byte/Word Organization Select (BYTE) The Byte/Word Organization Select pin is used to switch between the x8 and x16 Bus modes of the memory. When Byte/Word Organization Select is Low mode, when it is High then the two outermost boot blocks will remain protected even IL ...

Page 14

... This prevents Bus Write operations from accidentally damaging the data LKO during power up, power down and power surges. If the Program/Erase Controller is programming or erasing during this time then the operation aborts and the memory contents being altered will be invalid. A 0.1μF capacitor should be connected between the V Ground pin to decouple the current surges from the power supply ...

Page 15

... Write, Output Disable, Standby and Automatic Standby. See and = V Table 5: Bus operations, BYTE = V IL than 5ns on Chip Enable or Write Enable are ignored by the memory and do not affect bus operations. 3.1 Bus Read Bus Read operations read from the memory cells, or specific registers in the Command Interface ...

Page 16

... They require V applied to some pins. 3.6.1 Electronic Signature The memory has two codes, the manufacturer code and the device code, that can be read to identify the memory. These codes can be read by applying the signals listed in Bus operations, BYTE = V 3.6.2 Block Protect and Chip Unprotect Groups of blocks can be protected against accidental Program or Erase ...

Page 17

... Bus operations, BYTE = V Operation E Bus Read V IL Bus Write V IL Output Disable X Standby V IH Read Manufacturer Code V IL Read Device Code V IL Read Extended Memory V IL Block Verify Code Read Block Protection V IL Status (1) IL Address Inputs G W DQ15A–1, A0-A21 V ...

Page 18

... The Read/Reset command can be issued, between Bus Write cycles before the start of a program or erase operation, to return the device to read mode. If the Read/Reset command is issued during the timeout of a Block Erase operation then the memory will take up to 10μs to abort. During the abort period no valid data can be read from the memory. The Read/Reset command will not abort an Erase operation when issued while in Erase Suspend ...

Page 19

... When an error occurs the memory will continue to output the Status Register. A Read/Reset command must be issued to reset the error condition and return to Read Mode. The Chip Erase Command sets all of the bits in unprotected blocks of the memory to ’1’. All previous data is lost. (CFI), Tables 23, 24, 25, 26, ...

Page 20

... The Program/Erase Controller will suspend within the Erase Suspend Latency time of the Erase Suspend Command being issued. Once the Program/Erase Controller has stopped the memory will be set to Read mode and the Erase will be suspended. If the Erase Suspend command is issued during the period when the memory is waiting for an additional block (before the Program/Erase Controller starts) then the Erase is suspended immediately and will start immediately when the Erase Resume Command is issued ...

Page 21

Erase Resume command The Erase Resume command must be used to restart the Program/Erase Controller after an Erase Suspend. The device must be in Read Array mode before the Resume command will be accepted. An erase can be suspended ...

Page 22

... Register. A Read/Reset command must be issued to reset the error condition and return to Read mode. Note that the Program command cannot change a bit set at ’0’ back to ’1’. One of the Erase Commands must be used to set all the bits in a block or in the whole memory from ’0’ to ’1’. 22/71 and Section 4 ...

Page 23

Fast Program commands There are four Fast Program commands available to improve the programming throughput, by writing several adjacent words or bytes in parallel. The Double, Quadruple and Octuple Byte Program commands are available for x8 operations, while the ...

Page 24

... Read mode. Note that the Fast Program commands cannot change a bit set at ’0’ back to ’1’. One of the Erase Commands must be used to set all the bits in a block or in the whole memory from ’0’ to ’1’. Typical Program times are given in Endurance cycles ...

Page 25

... Unlock Bypass Program command The Unlock Bypass command is used in conjunction with the Unlock Bypass Program command to program the memory. When the cycle time to the device is long, considerable time saving can be made by using these commands. Three Bus Write operations are required to issue the Unlock Bypass command. ...

Page 26

... Extended Block mode where all Bus Read or Write operations to the Boot Block addresses access the Extended Block. The Extended Block (with the same address as the Boot Blocks) cannot be erased, and can be treated as one-time programmable (OTP) memory. In Extended Block mode the Boot Blocks are not accessible. ...

Page 27

Table 6. Commands, 16-bit mode, BYTE = V Command Addr Data Addr Data 1 X Read/Reset 3 555 Auto Select 3 555 Program 4 555 Double Word Program 3 555 Quadruple Word 5 555 Program Unlock Bypass 3 555 Unlock ...

Page 28

Table 7. Commands, 8-bit mode, BYTE = V Command 1st 2nd Add Data Add Data Add Data Add Data Add Data Add Data Add Data Add Data Add Data Read/Reset 3 AAA AA 555 55 Auto Select ...

Page 29

Table 8. Program, Erase times and Program, Erase Endurance cycles Parameter Chip Erase Block Erase (64 KBytes) Erase Suspend Latency time Program (Byte or Word) Double Byte Double Word /Quadruple Byte Program Quadruple Word / Octuple Byte Program Chip Program ...

Page 30

... DQ7, not its complement. During Erase operations the Data Polling Bit outputs ’0’, the complement of the erased state of DQ7. After successful completion of the Erase operation the memory returns to Read Mode. In Erase Suspend mode the Data Polling Bit will output a ’1’ during a Bus Read operation within a block being erased. The Data Polling Bit will change from a ’ ...

Page 31

... Error Bit is set to ’1’ when a Program, Block Erase or Chip Erase operation fails to write the correct data to the memory. If the Error Bit is set a Read/Reset command must be issued before other commands are issued. The Error bit is output on DQ5 when the Status Register is read. Note that the Program command cannot change a bit set to ’ ...

Page 32

Table 9. Status Register Bits Operation Program Program During Erase Suspend Program Error Chip Erase Block Erase before timeout Block Erase Erase Suspend Erase Error 1. Unspecified data bits should be ignored. Figure 4. Data Polling flowchart 32/71 (1) Address ...

Page 33

Figure 5. Data Toggle flowchart START READ DQ6 READ DQ5 & DQ6 DQ6 NO = TOGGLE YES NO DQ5 = 1 YES READ DQ6 TWICE DQ6 NO = TOGGLE YES FAIL PASS AI90195B 33/71 ...

Page 34

... These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Refer also to the Numonyx SURE Program and other relevant quality documents. ...

Page 35

DC and AC parameters This section summarizes the operating and measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC Characteristic tables that follow are derived from tests performed under the ...

Page 36

Table 12. Device capacitance Symbol C Input capacitance IN C Output capacitance OUT 1. Sampled only, not 100% tested. Table 13. DC characteristics Symbol Parameter I Input Leakage Current LI I Output Leakage Current LO I Supply Current (Read) CC1 ...

Page 37

Figure 8. Read Mode AC waveforms A0-A20/ A– DQ0-DQ7/ DQ8-DQ15 BYTE tELBL/tELBH Figure 9. Page Read AC waveforms A2-A21 A0-A1 VALID tAVQV E tELQV G tGLQV DQ0-DQ15 tAVAV VALID tAVQV tELQV tELQX tGLQX tGLQV tBHQV VALID ADDRESS VALID ...

Page 38

Table 14. Read AC characteristics Symbol Alt t t Address Valid to Next Address Valid AVAV Address Valid to Output Valid AVQV ACC t t Address Valid to Output Valid (Page) AVQV1 PAGE ( Chip ...

Page 39

Figure 10. Write AC waveforms, Write Enable controlled A0-A20/ A–1 E tELWL G tGHWL W DQ0-DQ7/ DQ8-DQ15 V CC tVCHEL RB tAVAV VALID tAVWL tWLWH tDVWH VALID tWHRL tWLAX tWHEH tWHGL tWHWL tWHDX AI05560 39/71 ...

Page 40

Table 15. Write AC characteristics, Write Enable controlled Symbol Alt t t Address Valid to Next Address Valid AVAV Chip Enable Low to Write Enable Low ELWL Write Enable Low to Write Enable High ...

Page 41

Figure 11. Write AC waveforms, Chip Enable controlled A0-A20/ A–1 W tWLEL G tGHEL E DQ0-DQ7/ DQ8-DQ15 V CC tVCHWL RB tAVAV VALID tAVEL tELEH tDVEH VALID tEHRL tELAX tEHWH tEHGL tEHEL tEHDX AI05561 41/71 ...

Page 42

Table 16. Write AC characteristics, Chip Enable controlled Symbol Alt t t Address Valid to Next Address Valid AVAV Write Enable Low to Chip Enable Low WLEL Chip Enable Low to Chip Enable High ...

Page 43

Figure 13. Accelerated Program Timing waveforms / tVHVPP Table 17. Reset/Block Temporary Unprotect AC characteristics Symbol Alt (1) t PHWL RP High to Write Enable Low, Chip Enable Low ...

Page 44

Package mechanical Figure 14. TSOP48 – 48 lead Plastic Thin Small Outline 20mm, top view package outline DIE 1. Drawing is not to scale. Table 18. TSOP48 – 48 lead Plastic Thin Small Outline, ...

Page 45

Figure 15. TFBGA48 6x8mm - 6x8 active ball array, 0.8mm pitch, package outline FD FE BALL "A1" Drawing is not to scale. Table 19. TFBGA48 6x8mm - 6x8 active ball array, 0.8mm pitch, package mechanical ...

Page 46

... Numonyx sales office. Devices are shipped from the factory with the memory content bits erased to 1. For a list of available options (Speed, Package, etc.) or for further information on any aspect of this device, please contact your nearest Numonyx Sales Office. 46/71 M29W640FB ...

Page 47

Appendix A Block addresses Table 21. Top Boot Block addresses, M29W640FT Block KBytes/KWords Protection Block Group 0 64/32 1 64/32 2 64/32 3 64/32 4 64/32 5 64/32 6 64/32 7 64/32 8 64/32 9 64/32 10 64/32 11 64/32 ...

Page 48

Table 21. Top Boot Block addresses, M29W640FT (continued) Block KBytes/KWords Protection Block Group 32 64/32 33 64/32 34 64/32 35 64/32 36 64/32 37 64/32 38 64/32 39 64/32 40 64/32 41 64/32 42 64/32 43 64/32 44 64/32 45 ...

Page 49

Table 21. Top Boot Block addresses, M29W640FT (continued) Block KBytes/KWords Protection Block Group 64 64/32 65 64/32 66 64/32 67 64/32 68 64/32 69 64/32 70 64/32 71 64/32 72 64/32 73 64/32 74 64/32 75 64/32 76 64/32 77 ...

Page 50

Table 21. Top Boot Block addresses, M29W640FT (continued) Block KBytes/KWords Protection Block Group 96 64/32 97 64/32 98 64/32 99 64/32 100 64/32 101 64/32 102 64/32 103 64/32 104 64/32 105 64/32 106 64/32 107 64/32 108 64/32 109 ...

Page 51

Table 21. Top Boot Block addresses, M29W640FT (continued) Block KBytes/KWords Protection Block Group 124 64/32 125 64/32 126 64/32 127 8/4 128 8/4 129 8/4 130 8/4 131 8/4 132 8/4 133 8/4 134 8/4 1. Used as the Extended ...

Page 52

Table 22. Bottom Boot Block addresses, M29W640FB Block KBytes/KWords 0 8/4 1 8/4 2 8/4 3 8/4 4 8/4 5 8/4 6 8/4 7 8/4 8 64/32 9 64/32 10 64/32 11 64/32 12 64/32 13 64/32 14 64/32 15 ...

Page 53

Table 22. Bottom Boot Block addresses, M29W640FB (continued) Block KBytes/KWords 35 64/32 36 64/32 37 64/32 38 64/32 39 64/32 40 64/32 41 64/32 42 64/32 43 64/32 44 64/32 45 64/32 46 64/32 47 64/32 48 64/32 49 64/32 ...

Page 54

Table 22. Bottom Boot Block addresses, M29W640FB (continued) Block KBytes/KWords 67 64/32 68 64/32 69 64/32 70 64/32 71 64/32 72 64/32 73 64/32 74 64/32 75 64/32 76 64/32 77 64/32 78 64/32 79 64/32 80 64/32 81 64/32 ...

Page 55

Table 22. Bottom Boot Block addresses, M29W640FB (continued) Block KBytes/KWords 99 64/32 100 64/32 101 64/32 102 64/32 103 64/32 104 64/32 105 64/32 106 64/32 107 64/32 108 64/32 109 64/32 110 64/32 111 64/32 112 64/32 113 64/32 ...

Page 56

Table 22. Bottom Boot Block addresses, M29W640FB (continued) Block KBytes/KWords 131 64/32 132 64/32 133 64/32 134 64/32 1. Used as the Extended Block addresses in Extended Block mode. 56/71 Protection Block Group 7C0000h-7CFFFFh 7D0000h-7DFFFFh Protection Group 7E0000h-7EFFFFh 7F0000h-7FFFFFh (x8) ...

Page 57

... When the CFI Query Command is issued the device enters CFI Query mode and the data structure is read from the memory. Tables 23, 24, 25, 26, 27, and 28, show the addresses used to retrieve the data. The CFI data structure also contains a security area where a 64 bit unique security number ...

Page 58

Table 24. CFI Query Identification String Address Data x16 x8 10h 20h 0051h 11h 22h 0052h Query Unique ASCII String "QRY" 12h 24h 0059h 13h 26h 0002h Primary Algorithm Command Set and Control Interface ID code 14h 28h 0000h 15h ...

Page 59

Table 26. Device Geometry Definition Address Data x16 x8 27h 4Eh 0017h Device Size = 2 28h 50h 0002h Flash Device Interface Code description 29h 52h 0000h 2Ah 54h 0004h Maximum number of bytes in multi-byte program or page = ...

Page 60

Table 27. Primary Algorithm-specific Extended Query table Address Data x16 x8 40h 80h 0050h 41h 82h 0052h 42h 84h 0049h 43h 86h 0031h Major version number, ASCII 44h 88h 0033h Minor version number, ASCII 45h 8Ah 0000h 46h 8Ch 0002h ...

Page 61

Table 28. Security Code Area Address Data x16 x8 61h C3h, C2h XXXX 62h C5h, C4h XXXX 63h C7h, C6h XXXX 64h C9h, C8h XXXX Description 64 bit: unique device number 61/71 ...

Page 62

... Bit DQ7 is the most significant bit in the Extended Block Verify Code and a specific procedure must be followed to read it. See “Extended Memory Block Verify Code Bus operations, BYTE = V read bit DQ7. ...

Page 63

Table 29. Extended Block address and data Address x8 x16 000000h-00007Fh 000000h-00003Fh 000080h-0000FFh 000040h-00007Fh Data Factory Locked Customer Lockable Security Identification Number Unavailable Determined by customer 63/71 ...

Page 64

... Appendix D Block protection Block protection can be used to prevent any operation from modifying the data stored in the memory. The blocks are protected in groups, refer to and Table 21 Table 22 Erase operations within the protected group fail to change the data. There are three techniques that can be used to control Block Protection, these are the Programmer technique, the In-System technique and Temporary Unprotection. Temporary Unprotection is controlled by the Reset/Block Temporary Unprotection pin, RP ...

Page 65

Table 30. Programmer technique bus operations, BYTE = V Operation E G Block (Group ( Protect Chip Unprotect Block (Group Protection Verify Block (Group ...

Page 66

Figure 16. Programmer Equipment Group Protect flowchart 1. Block Protection Groups are shown in 66/71 START ADDRESS = GROUP ADDRESS Wait 4µs W ...

Page 67

Figure 17. Programmer Equipment Chip Unprotect flowchart ADDRESS = CURRENT GROUP ADDRESS NO ++n = 1000 YES FAIL 1. Block Protection Groups are shown in START PROTECT ALL GROUPS n = ...

Page 68

Figure 18. In-System Equipment Group Protect flowchart 1. Block Protection Groups are shown can be either at V 68/71 START WRITE 60h ADDRESS = GROUP ADDRESS A0, A2, A3, A6 ...

Page 69

Figure 19. In-System Equipment Chip Unprotect flowchart ADDRESS = CURRENT GROUP ADDRESS ADDRESS = CURRENT GROUP ADDRESS ++ 1000 YES ISSUE READ/RESET COMMAND FAIL 1. Block Protection Groups are shown in START PROTECT ALL ...

Page 70

... Amended mistake in second title (M29W640FT changed to 5 M29W640FB); removed the 4th cycle from the double byte program of Table 7: Commands, 8-bit mode, BYTE = V 6 Table 9: Status Register Bits 7 Applied Numonyx branding. Added clarifications regarding V 8 commands. Changes and Table 5: Bus operations, BYTE ...

Page 71

... NUMONYX PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Numonyx products are not intended for use in medical, life saving, life sustaining, critical control or safety systems nuclear facility Numonyx may make changes to specifications and product descriptions at any time, without notice. ...

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