M29DW128F70ZA6F NUMONYX, M29DW128F70ZA6F Datasheet - Page 36

• Manufacturer Part Number: M29DW128F70ZA6F
• Description: IC FLASH 128MBIT 70NS 64TBGA
• Manufacturer: NUMONYX
• Series: Axcell™r

Specifications of M29DW128F70ZA6F

• Format - Memory: FLASH
• Memory Type: FLASH - Nor
• Memory Size: 128M (16Mx8, 8Mx16)
• Speed: 70ns
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Command interface
6.2.1
36/94
Write to Buffer and Program command
The Write to Buffer and Program Command makes use of the device’s 64-byte Write Buffer
to speed up programming. 32 Words/64 bytes can be loaded into the Write Buffer. Each
Write Buffer has the same A5-A22 addresses.The Write to Buffer and Program command
dramatically reduces system programming time compared to the standard non-buffered
Program command.
When issuing a Write to Buffer and Program command, the V
High, V
See
Five successive steps are required to issue the Write to Buffer and Program command:
1.
2.
3.
4.
5.
All the addresses used in the Write to Buffer and Program operation must lie within the
same page.
To program the content of the Write Buffer, this command must be followed by a Write to
Buffer and Program Confirm command.
If an address is written several times during a Write to Buffer and Program operation, the
address/data counter will be decremented at each data load operation and the data will be
programmed to the last word loaded into the Buffer.
Invalid address combinations or failing to follow the correct sequence of Bus Write cycles
will abort the Write to Buffer and Program.
The Status Register bits DQ1, DQ5, DQ6, DQ7 can be used to monitor the device status
during a Write to Buffer and Program operation.
If is not possible to detect Program operation fails when changing programmed data from ‘0’
to ‘1’, that is when reprogramming data in a portion of memory already programmed. The
resulting data will be the logical OR between the previous value and the current value.
A Write to Buffer and Program Abort and Reset command must be issued to abort the Write
to Buffer and Program operation and reset the device in Read mode.
During Write to Buffer and Program operations, the bank being programmed will accept
Program/Erase Suspend commands.
See
suggested flowchart on using the Write to Buffer and Program command.
Table 18
Appendix
The Write to Buffer and Program command starts with two unlock cycles.
The third Bus Write cycle sets up the Write to Buffer and Program command. The setup
code can be addressed to any location within the targeted block.
The fourth Bus Write cycle sets up the number of Words/bytes to be programmed.
Value N is written to the same block address, where N+1 is the number of Words/bytes
to be programmed. N+1 must not exceed the size of the Write Buffer or the operation
will abort.
The fifth cycle loads the first address and data to be programmed.
Use N Bus Write cycles to load the address and data for each Word/bytes into the
Write Buffer. Addresses must lie within the range from the start address+1 to the start
address + N-1. Optimum performance is obtained when the start address corresponds
to a 64 byte boundary. If the start address is not aligned to a 64 byte boundary, the total
programming time is doubled.
IH
or raised to V
for details on typical Write to Buffer and Program times in both cases.
E,
Figure 27: Write to Buffer and Program flowchart and Pseudo
PPH
.
PP/
WP pin can be either held
M29DW128F
Code, for a