TC58FVM6T5BTG65 Toshiba, TC58FVM6T5BTG65 Datasheet

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TC58FVM6T5BTG65

Manufacturer Part Number
TC58FVM6T5BTG65
Description
IC FLASH 64MBIT 65NS 48TSOP
Manufacturer
Toshiba
Datasheet

Specifications of TC58FVM6T5BTG65

Format - Memory
FLASH
Memory Type
FLASH - Nor
Memory Size
64M (8Mx8, 4Mx16)
Speed
65ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TC58FVM6T5BTG65
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
TOSHIBA MOS DIGITAL INTEGRATE CIRCUIT SILICON GATE CMOS
64M (4M × 16 BITS) CMOS FLASH MEMORY
1. DESCRIPTION
4194304 × 16 bits. The TC58FVM6(T/B)5B features commands for Read, Program and Erase operations to allow easy interfacing
with microprocessors. The commands are based on the JEDEC standard. The Program and Erase operations are automatically
executed in the chip. The TC58FVM6(T/B)5B also features a Simultaneous Read/Write operation so that data can be read during a
Write or Erase operation.
2. FEATURES
The TC58FVM6(T/B)5B is a 67108864-bit, 3V read-only electrically erasable and programmable flash memory organized as
Power supply voltage
Operating ambient temperature
Organization
Functions
Simultaneous Read/Write
Auto Program, Auto Page Program
Block protection/ Boot block protection
Page Read
Auto Block Erase, Auto Chip Erase
Fast Program Mode/Acceleration Mode
Program Suspend/Resume
Erase Suspend/Resume
Data polling/Toggle bit
Password block protection
Automatic Sleep, support for hidden ROM area
Common Flash memory Interface (CFI)
V
Ta = -40°C to 85°C
DD
4M × 16 Bits
= 2.7V to 3.6V
Block erase architecture
Bank architecture
Boot Block architecture
Mode control
Erase/Program cycles
Access Time (Random/Page)
Page Length: 8 words
Power consumption
Package
Lead-Free
10 μA (Standby)
15mA (Program/Erase operation)
55mA (Random Read operation)
11mA (Address Increment Read operation)
TC58FVM6(T/B)5BTG
TC58FVM6(T/B)5BXG
8 × 8 Kbytes / 127 × 64 Kbytes
8M Bits × 8 Bank
TC58FVM6T5B … top boot block
TC58FVM6B5B … bottom boot block
Compatible with JEDEC standard commands
10
65ns / 25ns
70ns / 30ns
5mA (Page Read operation)
P-TFBGA56-0710-0.80DZ
TSOP Ⅰ 48-P-1220-0.50
5
cycles typ
TC58FVM6(T/B)5B(TG/XG)65
(CL=30pF)
(CL=100pF)
(weight: 0.125g)
Lead-Free
2006-05-10 1/80
(weight: 0.51g)

Related parts for TC58FVM6T5BTG65

TC58FVM6T5BTG65 Summary of contents

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... TOSHIBA MOS DIGITAL INTEGRATE CIRCUIT SILICON GATE CMOS 64M (4M × 16 BITS) CMOS FLASH MEMORY 1. DESCRIPTION The TC58FVM6(T/B) 67108864-bit, 3V read-only electrically erasable and programmable flash memory organized as 4194304 × 16 bits. The TC58FVM6(T/B)5B features commands for Read, Program and Erase operations to allow easy interfacing with microprocessors ...

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... TABLE OF CONTENTS 64M (4M × 16 BITS) CMOS FLASH MEMORY .................................................................................................................................. 1 1. DESCRIPTION................................................................................................................................................................................. 1 2. FEATURES ...................................................................................................................................................................................... 1 3. ORDERING INFORMATION.......................................................................................................................................................... 3 4.PIN ASSIGNMENT (TOP VIEW) .................................................................................................................................................... 4 5. BLOCK DIAGRAM........................................................................................................................................................................... 5 6. MODE SELECTION ........................................................................................................................................................................ CODE TABLE ............................................................................................................................................................................. 6 8. COMMAND SEQUENCES .............................................................................................................................................................. 7 9. SIMULTANEOUS READ/WRITE OPERATION............................................................................................................................ 9 10. OPERATION MODES.................................................................................................................................................................. 10 10.1. Read Mode.............................................................................................................................................................................. 10 10.2. ID Read Mode......................................................................................................................................................................... 10 10 ...

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... ORDERING INFORMATION TC58 Ordering type TC58FVM6T5BXG65 TC58FVM6B5BXG65 TC58FVM6T5BTG65 TC58FVM6B5BTG65 Speed version 65 = 65ns Package TG = TSOP XG = BGA Design rule B = 0.13 μm Function/Bank size 4 = Page/Burst /8M Uniform bank 5 = Page/8M Uniform bank Boot block architecture T = Top boot block B = Bottom boot block Capacity M6 = 64Mbits Supply Voltage system ...

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ASSIGNMENT (TOP VIEW) TC58FVM6T5BTG / TC58FVM6B5BTG A15 1 A14 2 A13 3 A12 4 A11 5 A10 A19 9 A20 RESET 12 A21 13 WP /ACC ...

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... BLOCK DIAGRAM Control Circuit / ACC WP WE RESET CE Command Register OE A0 A21 TC58FVM6(T/B)5B(TG/XG) Buffer Memory Cell Memory Cell Array Array Bank 0 Bank 1 DQ0 DQ15 I/O Buffer Data Latch Memory Cell Memory Cell Array Array Bank 6 Bank 7 2006-05-10 5/80 ...

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MODE SELECTION MODE CE Read/Page Read L ID Read (Manufacturer Code Read (Device Code) L Standby H Output Disable * Write L Block Protect 1 L Block Protect 2 L Verify Block Protect L Temporary Block Unprotect ...

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COMMAND SEQUENCES BUS COMMAND WRITE SEQUENCE CYCLES REQ’D Read/Reset 1 Read/Reset 3 ID Read 3 Auto Program 4 Auto Page Program 11 Program Suspend 1 Program Resume 1 Auto Chip Erase 6 Auto Block Erase 6 Block Erase Suspend ...

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COMMAND SEQUENCES(continue) BUS FIRST BUS COMMAND WRITE WRITE CYCLE SEQUENCE CYCLES Addr. Data REQ’D 555h AAh 555h AAh Password 4 Program 555h AAh 555h AAh Password Unlock 7 555h AAh Password Verify 3 555h AAh Password Protection 5 555h ...

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SIMULTANEOUS READ/WRITE OPERATION The TC58FVM6(T/B)5B features a Simultaneous Read/Write operation. The Simultaneous Read/Write operation enables the device to simultaneously write data to or erase data from a bank while reading data from another bank. The TC58FVM6(T/B)5B has a total ...

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... To read an ID code, the bank address as well as the ID read address must be specified (with maker code is output from address BK + 00; the device code is output from address BK + 01. From other banks, data is output from the memory cells. Inputting a Reset command releases ID Read Mode and returns the device to Read Mode. 10.3. Standby Mode TC58FVM6(T/B)5B has two ways to put the device into Standby Mode ...

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Command Write The TC58FVM6(T/B)5B uses the standard JEDEC control commands for a single-power supply E Write is executed by inputting the address and data into the Command Register. The command is written by inputting a pulse to WE with ...

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... The device allows programmed into memory cells which contain cannot be programmed into cells which contain 0s. If this is attempted, execution of Auto Program will fail. This is a user error, not a device error. A cell containing 0 must be erased in order to set ...

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... The Auto Chip Erase Mode is set using the Chip Erase command. An Auto Chip Erase operation starts on the latch of the command in the sixth bus cycle. All memory cells are automatically preprogrammed to 0, erased and verified as erased by the chip. The device status is indicated by the Hardware Sequence flag. ...

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Erase Suspend/Erase Resume Modes Erase Suspend Mode suspends Auto Block Erase and reads data from or writes data to an unselected block. The Erase Suspend command is allowed during an auto block erase operation but is ignored in all ...

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Block Protection TC58FVM6(T/B)5B has Block Protection that is a function for disabling writing and erasing specific blocks. Block Protection features several level of Block Protection. WP /ACC (1) Write Protect ( pin) [Hardware Protection] The TC58FVM6(T/B)5B has Hardware Block ...

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Relationship of the Each Block Protection Block Protection 1 Block Protection 3 (PPB) Block Protection 2 (Non-Password Protection mode) Power-Up PPB Lock is a cleared state (PPB Set/Clear is enabled) (PPB Set/Clear is disabled) PPB Set * A program ...

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Non-Password Protection Mode and Password Protection Mode At Block Protection 3, there are two Protection Mode of Non-Password Protection Mode and Password Protection Mode. Operation of a PPB lock differs in each mode. The hosts need to choose either ...

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... The actual Password length is 64-bits. The 64-bits password is split to four of 16-bits Password Program. In Password Protection Mode, Password Program and Password verify are disabled. During programming the Password, Simultaneous Operation is disabled. Read operations to any memory location is available after completion of the password programming. The status of password program operation can be checked by hardware sequence flags. When this mode is finished, the hosts have to execute the Hidden ROM Exit command. Password is set as four words of “ ...

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Status Flags of progressing the Password Unlock Command PWD Unlock in Progress (1) Finished Input PWD (1) Finished Input PWD (4) Finished Input PWD Notes: (1) Specified BA within Bank-0 (Bottom Boot Block Device)/ Bank-7 (Top Boot Block Device) (2) ...

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... Hidden ROM Area The TC58FVM6(T/B)5B features a 64-Kbyte hidden ROM area, which is separate from the memory cells. The area consists of one block. Data Read, Write and Protect can be performed on this block. Because Protect cannot be released, once the block is protected, data in the block cannot be overwritten. ...

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... CFI (Common Flash memory Interface) The TC58FVM6(T/B)5B conforms to the CFI specifications. To read information from the device, input the Query command followed by the address. In Word Mode DQ8~DQ15 all output 0s. To exit this mode, input the Reset command. CFI CODE TABLE 1 (Continue) ...

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CFI CODE TABLE 2(Sequel) ADDRESS A6~A0 DATA DQ15~DQ0 2Ch 0002h 2Dh 0007h 2Eh 0000h 2Fh 0020h 30h 0000h 31h 00FEh 32h 0000h 33h 0000h 34h 0001h 40h 0050h 41h 0052h 42h 0049h 43h 0031h 44h 0031h 45h 0000h 46h 0002h ...

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CFI CODE TABLE 3(Sequel) ADDRESS A6~A0 DATA DQ15~DQ0 57h 0010h 58h 00XXh 59h 0010h 5Ah 0010h 5Bh 0010h 5Ch 0010h 5Dh 0010h 5Eh 0010h 5Fh 00XXh TC58FVM6(T/B)5B(TG/XG)65 DESCRIPTION Bank Organization 00h: Data at 4Ah is zero X: Number of Banks ...

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... WE in the last bus cycle. DQ6 alternately outputs for each OE access while while the device is busy. When the internal operation has been completed, toggling stops and valid memory IL cell data can be read by subsequent reading. If the operation fails, the DQ6 output toggles. ...

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DQ5 (internal time-out Auto-Program or auto-erase operates normally, DQ5 outputs the internal timer times out during a Program or Erase operation, DQ5 outputs a 1. This indicates that the operation has not been completed ...

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... Then, even if a proper command is input, the device may not operate. To avoid this possibility, clear the Command Register before command input environment prone to system noise, Toshiba recommends input of a software or hardware reset before command input. 11.3. Protection against Malfunction at Power-on To prevent damage to data caused by sudden noise at power-on, when power is turned on with does not latch the command on the first rising edge ...

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ABSOLUTE MAXIMUM RATINGS SYMBOL V V Supply Voltage Input Voltage IN V Input/Output Voltage DQ V Maximum Input Voltage for A9, OE and RESET ID V Maximum Input Voltage for ACC P Power Dissipation D T ...

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DC CHARACTERISTICS SYMBOL PARAMETER I Input Leakage Current LI I Output Leakage Current LO V Output High Voltage OH V Output Low Voltage Average Random Read Current DDO1 Average Program Current DDO2 DD ...

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AC CHARACTERISTICS AND OPERATING CONDITIONS 17.1. Read Cycle Symbol t Read Cycle Time RC t Page Read Cycle Time PRC t Address Access Time ACC t CE Access Time Access Time OE t Page Access Time ...

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Block Protect SYMBOL t V Transition Time VPT Set-up Time VPS Set-up Time CESP t OE Hold Time VPH t WE Low-Level Hold Time PPLH 17.3. Program and Erase characteristics SYMBOL t Auto-Program ...

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Command Write/Program/Erase cycle SYMBOL t Command Write Cycle Time CMD t Address Set-up Time AS t Address Hold Time AH t Data Set-up Time DS t Data Set-up Time Low-Level Hold Time WELH t WE High-Level ...

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TIMING DIAGRAMS Read/ID Read Operation Address OEH D OUT ID Read Operation (apply OUT Read Mode Data ...

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Page Read Operation Address(A3-21))) Address(0- OUT Hi-Z Read after command input (Only Hidden Rom/CFI Read) Last command address Address Command data D OUT PRC PRC RC ACC t CE ...

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Command Write Operation This is the timing of the Command Write Operation. The timing which is described in the following pages is essentially the same as the timing shown on this page. • Control WE Address ...

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ID Read Operation (input command sequence) Address 555h t CMD OES OUT Read Mode (input of ID Read command sequence) (Continued) Address 555h t CMD OUT ID ...

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Auto-Program Operation ( WE Address 555h t CMD OES WE D AAh IN D OUT t VDS V DD Notes: PA: Program address PD: Program data Control) 2AAh 555h PA 55h A0h Hi-Z TC58FVM6(T/B)5B(TG/XG) OEHP ...

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Auto Page Program Operation ( Address(A3-21) 555h 2AAh Address(A0- OES WE AAh 55h OUT t VDS V DD Notes: PA: Program address PD: Program Data Control CMD ...

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Auto Chip Erase/Auto Block Erase Operation ( Address 555h 2AAh t CMD OES WE D AAh IN t VDS V DD Notes: BA: Block Address Control) WE 555h 555h 55h 80h AAh TC58FVM6(T/B)5B(TG/XG)65 2AAh 555h/BA 55h 10h/30h ...

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Auto-Program Operation ( CE Address 555h t CMD OES AAh D OUT t VDS V DD Note: PA: Program address PD: Program data Control) 2AAh 555h PA 55h A0h Hi-Z TC58FVM6(T/B)5B(TG/XG) PPW ...

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Auto Page Program Operation ( Address(A3-21) 555h 2AAh 555h Address(A0- OES WE AAh 55h OUT t VDS V DD Notes: PA: Program address PD: Program data Control CMD ...

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Auto Chip Erase/Auto Block Erase Operation ( Address 555h t CMD OES WE D AAh IN t VDS V DD Note: BA: Block address for Auto Block Erase operation CE Control) 2AAh 555h 555h 55h 80h AAh ...

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Program/Erase Suspend Operation Address B0h IN D Hi-Z OUT t SUSP Program/Erase Mode RA: Read address OUT /t SUSE Suspend Mode TC58FVM6(T/B)5B(TG/XG)65 Hi-Z 2006-05-10 42/80 ...

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Program/Erase Resume Operation Address OES WE t DF1 t DF2 OUT OUT Suspend Mode PA: Program address BK: Bank address BA: Block address RA: Read address Flag: Hardware Sequence ...

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Auto Program/Erase Operation Hardware Reset Operation (At the Auto Operation) WE RESET Read after RESET Address Address RESET RESET D D OUT OUT Command input sequence t RB ...

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Hardware Sequence Flag ( DATA Last Address Command Address t CMD Last D Command IN Data DQ7 DQ0~DQ6 t BUSY PA: Program address BA: Block address Hardware Sequence Flag (Toggle bit) Address CE t ...

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Block Protect 1 Operation (PPB Set) Address VPT VPS WE t CESP CE D OUT BA: Block address * : 01h indicates that block is ...

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Block Protect 2 Operation (PPB Set) Address t CMD VPS RESET D 60h IN D OUT BA: Block address Address of next block * : 01h ...

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FLOWCHARTS Auto-Program Address = Address + 1 TC58FVM6(T/B)5B(TG/XG)65 Start Auto-Program Command Sequence (see below) DATA Polling or Toggle Bit No Last Address? Yes Auto-Program Completed Auto-Program Command Sequence (address/data) 555h/AAh 2AAh/55h 555h/A0h Program Address/ Program Data 2006-05-10 48/80 ...

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Auto-Page Program Address = Address + 1 Program address (A2=0,A1=0,A0=0) / Program data Program address (A2=0,A1=0,A0=1) / Program data Program address (A2=0,A1=1,A0=0) / Program data Program address (A2=0,A1=1,A0=1) / Program data START Auto page program command sequence (see below ) ...

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Fast Program Address = Address + 1 Fast Program Set Command Sequence (address/data) 555h/AAh 2AAh/55h 555h/20h TC58FVM6(T/B)5B(TG/XG)65 Start Fast Program Set Command Sequence (see below) Fast Program Command Sequence (see below) DATA Polling or Toggle Bit No Last Address? Yes ...

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Auto Erase Auto Chip Erase Command Sequence (address/data) 555h/AAh 2AAh/55h 555h/80h 555h/AAh 2AAh/55h 555h/10h TC58FVM6(T/B)5B(TG/XG)65 Start Auto Erase Command Sequence (see below) DATA Polling or Toggle Bit Auto Erase Completed Auto Block/Auto Multi-Block Erase Command Sequence (address/data) 555h/AAh 2AAh/55h 555h/80h ...

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DQ7 Polling DATA Read Byte (DQ0~DQ7) Addr DQ7 = Data? No Read Byte (DQ0~DQ7) Addr DQ7 = Data? DQ6 Toggle Bit Read Byte (DQ0~DQ7) Addr DQ6 = Toggle? No DQ5 = 1? Read Byte ...

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Block Protect Yes BPA: Block Address and ID Read Address (A6, A1, A0) ID Read Address = ( Start PLSCNT = 1 Set up Block Address Addr. = BPA Wait for 4 ...

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Block Protect 2 Command First Bus Write Cycle Command Second Bus Write Cycle Command Third Bus Write Cycle Yes Remove V BPA: Block Address and ID Read Address (A6, A1, A0) ID Read Address = ( Start RESET ...

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Hidden ROM Exit Command Input TC58FVM6(T/B)5B(TG/XG)65 START 555h/AAh 2AAh/55h 555h/90h 555h/00h FINISH 2006-05-10 55/80 ...

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Password Protection Mode Locking Set Operation PLSCNT = 1 Password Protection Mode Lock Bit Set Command Sequence 4th Bus Write Cycle (x0A/68h) Password Protection Mode Lock Bit Set Command Sequence 5th Bus Write Cycle (x0A/48h) Verify Lock Bit HiddenROM Exit ...

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Password Program Operation PWA = PWA +1 No TC58FVM6(T/B)5B(TG/XG)65 START PWA = 0 555h/AAh 2AAh/55h 555h/38h Password Program Command Sequence 4th Bus Write Cycle (PWA/PWD) Read Status No DQ7 = 1? Yes HiddenROM Exit Command PWA = 3? Yes Password ...

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Password Verify Operation START 555h/AAh 2AAh/55h 555h/C8h Read Password 0 Read Password 1 (x0h/PWD) (x0h/PWD) Read Password 1 (x1h/PWD) Read Password 2 (x2h/PWD) Read Password 3 (x3h/PWD) HiddenROM Exit Command Password Verify Complete TC58FVM6(T/B)5B(TG/XG)65 2006-05-10 58/80 ...

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Password Unlock Command Operation TC58FVM6(T/B)5B(TG/XG)65 START 555h/AAh 2AAh/55h 555h/28h Write Password 0 Read Password 1 (x0h/PWD0) (x0h/PWD) Wait 2us or DQ6= No Toggle? Write Password 1 (x1h/PWD1) Wait 2us or DQ6= No Toggle? Write Password 2 (x2h/PWD2) Wait 2us or ...

Page 60

Non-Password Protection Mode Locking Set Operation Non-Password Protection Mode Lock Bit Set Command Sequence 4th Bus Cycle (x12/68h) Non-Password Protection Mode Lock Bit Set Command Sequence 5th Bus Cycle (x12/48h) HiddenROM Exit Command START PLSCNT = 1 555h/AAh 2AAh/55h 555h/60h ...

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PPB Set Command Sequence PLSCNT = 1 Yes START PLSCNT = 1 555h/AAh 2AAh/55h 555h/60h PPB Set Command Sequence 4th Bus Write Cycle (BA+02n/68h) Wait 100 μ s PPB Set Command Sequence 5th Bus Write Cycle (BA+02h/48h) Verify Block Protect ...

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PPB Clear Command Sequence No TC58FVM6(T/B)5B(TG/XG)65 START PLSCNT = 1, BA=0 555h/AAh 2AAh/55h 555h/60h PPB Clear Command Sequence 4th Write Cycle (xx02h/60h) Wait 10 ms PPB Clear Command Sequence 5th Write Cycle (BA+02h/40h) Verify Block Protect No Data = x0h? ...

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PPB Lock Operation PPB Lock Set START 555h/AAh 2AAh/55h 555h/78h HiddenROM Exit Command PPB Lock Verify HiddenROM Exit Command Program Complete PPB Lock Clear START Power VIL RESET Complete TC58FVM6(T/B)5B(TG/XG)65 PPB Lock Verify START 555h/AAh 2AAh/55h 555h/58h ...

Page 64

DPB Command Operation DPB Set START 555h/AAh 2AAh/55h 555h/48h BA/x1h Yes Protect Another Block? No HiddenROM Exit Command Program Complete DPB Clear 1 START 555h/AAh 2AAh/55h 555h/48h BA/00h Yes Erase Another Block? No HiddenROM Exit Command Erase Complete TC58FVM6(T/B)5B(TG/XG)65 DPB ...

Page 65

BLOCK ADDRESS TABLES * : 20.1. TC58FVM6T5B (Top Boot Block) 1/5 BLOCK ADDRESS BANK BLOCK BANK ADDRESS # # A21 A20 BA0 L L BA1 L L BA2 L L BA3 L L BA4 ...

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TC58FVM6T5B (Top Boot Block) 2/5 BLOCK ADDRESS BANK BLOCK BANK ADDRESS # # A21 A20 BA32 L H BA33 L H BA34 L H BA35 L H BA36 L H BA37 L H BA38 L H BA39 L H ...

Page 67

TC58FVM6T5B (Top Boot Block) 3/5 BLOCK ADDRESS BANK BLOCK BANK ADDRESS # # A21 A20 BA64 H L BA65 H L BA66 H L BA67 H L BA68 H L BA69 H L BA70 H L BA71 H L ...

Page 68

TC58FVM6T5B (Top Boot Block) 4/5 BLOCK ADDRESS BANK BLOCK BANK ADDRESS # # A21 A20 BA96 H H BA97 H H BA98 H H BA99 H H BA100 H H BA101 H H BA102 H H BA103 H H ...

Page 69

TC58FVM6T5B (Top Boot Block) 5/5 BLOCK ADDRESS BANK BLOCK BANK ADDRESS # # A21 A20 BA127 H H BA128 H H BA129 H H BA130 H H BK7 BA131 H H BA132 H H BA133 H H BA134 H ...

Page 70

TC58FVM6B5B (Bottom Boot Block) 1/5 BLOCK ADDRESS BANK BLOCK BANK ADDRESS # # A21 A20 BA0 L L BA1 L L BA2 L L BA3 L L BK0 BA4 L L BA5 L L BA6 L L BA7 L ...

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TC58FVM6B5B (Bottom Boot Block) 2/5 BLOCK ADDRESS BANK BLOCK BANK ADDRESS # # A21 A20 A19 BA8 BA9 BA10 BA11 BA12 BA13 L L ...

Page 72

TC58FVM6B5B (Bottom Boot Block) 3/5 BLOCK ADDRESS BANK BLOCK BANK ADDRESS # # A21 A20 A19 BA39 BA40 BA41 BA42 BA43 BA44 L H ...

Page 73

TC58FVM6B5B (Bottom Boot Block) 4/5 BLOCK ADDRESS BANK BLOCK BANK ADDRESS # # A21 A20 A19 BA71 BA72 BA73 BA74 BA75 BA76 H L ...

Page 74

TC58FVM6B5B (Bottom Boot Block) 5/5 BLOCK ADDRESS BANK BLOCK BANK ADDRESS # # A21 A20 A19 BA103 BA104 BA105 BA106 BA107 BA108 H H ...

Page 75

BLOCK SIZE TABLE 21.1. TC58FVM6T5B (Top Boot Block) BLOCK BLOCK SIZE # BA0~BA15 32 Kwords x 16 BA16~BA31 32 Kwords x 16 BA32~BA47 32 Kwords x 16 BA48~BA63 32 Kwords x 16 BA64~BA79 32 Kwords x 16 BA80~BA95 32 ...

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TC58FVM6B5B (Bottom Boot Block) BLOCK BLOCK SIZE # 32 Kwords BA0~BA22 4 Kwords x 8 BA23~BA38 32 Kwords x 16 BA39~BA54 32 Kwords x 16 BA55~BA70 32 Kwords x 16 BA71~BA86 32 Kwords x 16 BA87~BA102 ...

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PACKAGE DIMENSIONS TC58FVM6(T/B)5B(TG/XG)65 2006-05-10 77/80 Unit: mm ...

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TC58FVM6(T/B)5B(TG/XG)65 2006-05-10 78/80 Unit: mm ...

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REVISION HISTORY Date Rev. Original version 2004-07-22 1.00 Change of the address which makes password unlock possible. 2004-09-06 1.01 The state of the RDY pin in password mode is added. 2004-10-04 1.02 Changed Specification (tSUSP) 2004-11-08 1.03 Changed the ...

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... The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of TOSHIBA or others. • ...

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