CAT93C56VI-GT3 ON Semiconductor, CAT93C56VI-GT3 Datasheet

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CAT93C56VI-GT3

Manufacturer Part Number
CAT93C56VI-GT3
Description
IC EEPROM 2KBIT 2MHZ 8SOIC
Manufacturer
ON Semiconductor
Series
-r
Datasheet

Specifications of CAT93C56VI-GT3

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
2K (256 x 8 or 128 x 16)
Speed
2MHz
Interface
Microwire, 3-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
93C56VI-GT3

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CAT93C56VI-GT3
Manufacturer:
ON Semiconductor
Quantity:
3 550
Part Number:
CAT93C56VI-GT3
Manufacturer:
ON/安森美
Quantity:
20 000
CAT93C56, CAT93C57
2-Kb Microwire Serial
CMOS EEPROM
Description
is organized as either 128 registers of 16 bits (ORG pin at V
registers of 8 bits (ORG pin at GND). Each register can be written (or
read) serially by using the DI (or DO) pin. The CAT93C56/57 features
sequential read and self−timed internal write with auto−clear. On−chip
Power−On Reset circuitry protects the internal logic against powering
up in the wrong state.
Features
NOTE: When the ORG pin is connected to V
When it is connected to ground, the x8 pin is selected. If the ORG pin is left
unconnected, then an internal pullup device will select the x16 organization.
© Semiconductor Components Industries, LLC, 2009
August, 2009 − Rev. 18
ORG
The CAT93C56/57 is a 2−kb CMOS Serial EEPROM device which
CS
Compliant
SK
High Speed Operation: 2 MHz
1.8 V to 5.5 V Supply Voltage Range
Selectable x8 or x16 Memory Organization
Sequential Read
Software Write Protection
Power−up Inadvertant Write Protection
Low Power CMOS Technology
1,000,000 Program/Erase Cycles
100 Year Data Retention
Industrial and Extended Temperature Ranges
8−pin PDIP, SOIC, TSSOP and 8−pad TDFN Packages
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
DI
Figure 1. Functional Symbol
CAT93C56
CAT93C57
GND
V
CC
CC
, the x16 organization is selected.
DO
CC
1
) or 256
See detailed ordering and shipping information in the package
dimensions section on page 16 of this data sheet.
V or W SUFFIX
V
CASE 751BD
CASE 646AA
NC
CS
SK
CC
L SUFFIX
Pin Name
SOIC−8
PDIP−8
(Top Views)
SOIC (W*)
GND
ORG
V
DO
NC
CS
SK
DI
CC
1
DO
CS
SK
DI
ORDERING INFORMATION
TSSOP (Y), TDFN (VP2, ZD4*)
PIN CONFIGURATIONS
ORG
GND
DO
DI
PDIP (L), SOIC (V, X),
http://onsemi.com
PIN FUNCTION
1
SOIC−8 EIAJ
CASE 751BE
CASE 511AL
ZD4 SUFFIX
Chip Select
Clock Input
Serial Data Input
Serial Data Output
Power Supply
Ground
Memory Organization
No Connection
X SUFFIX
TDFN−8
* TDFN 3x3 mm (ZD4) and
SOIC (W) rotated pin−out
packages are available for
CAT93C57 and CAT93C56,
Rev. E only (not recommen-
ded for new designs of
CAT93C56)
Publication Order Number:
Function
CASE 511AK
CASE 948AL
VP2 SUFFIX
CAT93C56/D
TSSOP−8
Y SUFFIX
V
NC
ORG
GND
TDFN−8
CC

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CAT93C56VI-GT3 Summary of contents

Page 1

... Power−On Reset circuitry protects the internal logic against powering up in the wrong state. Features • High Speed Operation: 2 MHz • 1 5.5 V Supply Voltage Range • Selectable x8 or x16 Memory Organization • Sequential Read • Software Write Protection • Power−up Inadvertant Write Protection • ...

Page 2

Table 1. ABSOLUTE MAXIMUM RATINGS Parameters Storage Temperature Voltage on Any Pin with Respect to Ground (Note 1) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is ...

Page 3

Table 4. D.C. OPERATING CHARACTERISTICS, CAT93C56/57, Die Rev. E – Mature Product (CAT93C56, Rev. E – NOT RECOMMENDED FOR NEW DESIGNS) Symbol Parameter I Power Supply Current (Write) CC1 I Power Supply Current (Read) CC2 I Power Supply Current (Standby) ...

Page 4

Table 6. A.C. CHARACTERISTICS (V = +1.8V to +5.5V −40°C to +125°C, unless otherwise specified Symbol t CS Setup Time CSS t CS Hold Time CSH t DI Setup Time DIS t DI Hold Time DIH ...

Page 5

... Input Pulse Voltages Timing Reference Voltages Output Load Device Operation The CAT93C56/ 2048−bit nonvolatile memory intended for use with industry standard microprocessors. The CAT93C56/57 can be organized as either registers of 16 bits or 8 bits. When organized as X16, seven 10−bit instructions for 93C57 or seven 11−bit instructions for 93C56 control the reading, writing and erase operations of the device. When organized as X8, seven 11− ...

Page 6

The format for all instructions sent to the device is a logical “1” start bit, a 2−bit (or 4−bit) opcode, 7−bit address (CAT93C57) / 8−bit address (CAT93C56) (an additional bit Table 10. INSTRUCTION SET Start Bit Instruction Device Type READ ...

Page 7

Read Upon receiving a READ command and an address (clocked into the DI pin), the DO pin of the CAT93C56/57 will come out of the high impedance state and, after sending an initial dummy zero bit, will begin shifting out ...

Page 8

... The ready/busy status of the CAT93C56/57 can be determined by selecting the device and polling the DO pin. Since this device features Auto−Clear before write NOT necessary to erase a memory location before it is written into ...

Page 9

... The clocking of the SK pin is not necessary after the device has entered the self clocking mode. The ready/busy status of the CAT93C56/57 can be determined by selecting the device and polling the DO pin not necessary for all memory locations to be cleared before the WRAL command is executed. ...

Page 10

PIN # 1 IDENTIFICATION D TOP VIEW SIDE VIEW Notes: (1) All dimensions are in millimeters. (2) Complies with JEDEC MS-001. PACKAGE DIMENSIONS PDIP−8, 300 mils CASE 646AA−01 ISSUE A SYMBOL ...

Page 11

PIN # 1 IDENTIFICATION TOP VIEW SIDE VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MS-012. PACKAGE DIMENSIONS SOIC 8, 150 mils CASE 751BD−01 ISSUE O SYMBOL ...

Page 12

PIN#1 IDENTIFICATION TOP VIEW SIDE VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with EIAJ EDR-7320. PACKAGE DIMENSIONS SOIC−8, 208 mils CASE 751BE−01 ISSUE O SYMBOL ...

Page 13

E1 e TOP VIEW SIDE VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MO-153. PACKAGE DIMENSIONS TSSOP8, 4.4x3 CASE 948AL−01 ISSUE O SYMBOL MIN A A1 0.05 A2 ...

Page 14

D E PIN#1 INDEX AREA TOP VIEW SYMBOL MIN NOM A 0.70 0.75 A1 0.00 0.02 A2 0.45 0.55 A3 0.20 REF b 0.20 0.25 D 1.90 2.00 D2 1.30 1.40 E 2.90 3.00 E2 1.20 1.30 e 0.50 TYP ...

Page 15

D PIN#1 INDEX AREA TOP VIEW SYMBOL MIN NOM A 0.70 0.75 A1 0.00 0.02 A3 0.20 REF b 0.23 0.30 D 2.90 3.00 D2 2.20 −−− E 2.90 3.00 E2 1.40 −−− e 0.65 TYP L 0.20 0.30 Notes: ...

Page 16

... All packages are RoHS−compliant (Lead−free, Halogen−free). 11. The standard lead finish is NiPdAu. 12. The device used in the above example is a CAT93C56VI−1.8−GT3 (SOIC green package, Industrial Temperature, 1.8 Volt to 5.5 Volt Operating Voltage, NiPdAu finish, Tape & Reel). 13. Product die revision letter is marked on top of the package as a suffix to the production date code (e.g., AYWWE). For additional information, please contact your ON Semiconductor sales office. 14. For SOIC, EIAJ (X) package the standard lead finish is Matte− ...

Page 17

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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