VIPER100ASPTR-E STMicroelectronics, VIPER100ASPTR-E Datasheet - Page 11

IC SWIT PWM SMPS CM POWERSO10

VIPER100ASPTR-E

Manufacturer Part Number
VIPER100ASPTR-E
Description
IC SWIT PWM SMPS CM POWERSO10
Manufacturer
STMicroelectronics
Series
VIPER™r
Datasheet

Specifications of VIPER100ASPTR-E

Output Isolation
Isolated
Frequency Range
90 ~ 200kHz
Voltage - Input
8 ~ 15 V
Voltage - Output
700V
Power (watts)
82W
Operating Temperature
25°C ~ 125°C
Package / Case
PowerSO-10 Exposed Bottom Pad
Number Of Outputs
1
Output Voltage
700 V (Min)
Output Current
3000 mA
Mounting Style
SMD/SMT
Switching Frequency
90 KHz to 110 KHz
Fall Time
100 ns
Rise Time
50 ns
Synchronous Pin
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-6163-2
VIPer100A-E/ASP-E
5
5.1
5.2
Operation Description
Current Mode Topology:
The current mode control method, like the one integrated in the VIPer100A-E/ASP-E, uses two
control loops - an inner current control loop and an outer loop for voltage control. When the
Power MOSFET output transistor is on, the inductor current (primary side of the transformer) is
monitored with a SenseFET technique and converted into a voltage V
current. When V
switched off. Thus, the outer voltage control loop defines the level at which the inner loop
regulates peak current through the power switch and the primary winding of the transformer.
Excellent open loop D.C. and dynamic line regulation is ensured due to the inherent input
voltage feedforward characteristic of the current mode control. This results in improved line
regulation, instantaneous correction to line changes, and better stability for the voltage
regulation loop.
Current mode topology also ensures good limitation in case there is a short circuit. During the
first phase the output current increases slowly following the dynamic of the regulation loop.
Then it reaches the maximum limitation current internally set and finally stops because the
power supply on V
internally set can be overridden by externally limiting the voltage excursion on the COMP pin.
An integrated blanking filter inhibits the PWM comparator output for a short time after the
integrated Power MOSFET is switched on. This function prevents anomalous or premature
termination of the switching pulse in case there are current spikes caused by primary side
capacitance or secondary side rectifier reverse recovery time.
Stand-by Mode
Stand-by operation in nearly open load conditions automatically leads to a burst mode
operation allowing voltage regulation on the secondary side. The transition from normal
operation to burst mode operation happens for a power P
Where:
L
I
device is able to provide in normal operation. This current can be computed as :
t
and comparator, and represents roughly the minimum on time of the device. Note: that PSTBY
may be affected by the efficiency of the converter at low load, and must include the power
drawn on the primary auxiliary voltage.
STBY
b
P
+ t
is the primary inductance of the transformer. F
d
is the minimum controllable current, corresponding to the minimum on time that the
is the sum of the blanking time and of the propagation time of the internal current sense
P
I
STBY
STBY
S
=
=
reaches V
DD
-----------------------------
1
-- - L
2
t
b
is no longer correct. For specific applications the maximum peak current
+
P
I
L
t
2
d
p
STBY
V
IN
COMP
F
SW
(the amplified output voltage error) the power switch is
SW
is the normal switching frequency.
STBY
given by :
S
proportional to this
5 Operation Description
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