VIPER100A-E STMicroelectronics, VIPER100A-E Datasheet - Page 22

• Manufacturer Part Number: VIPER100A-E
• Description: IC SWIT PWM SMPS CM PENTAWATT5
• Manufacturer: STMicroelectronics
• Series: VIPER™r

Specifications of VIPER100A-E

• Output Isolation: Isolated
• Frequency Range: 90 ~ 200kHz
• Voltage - Input: 8 ~ 15 V
• Voltage - Output: 700V
• Power (watts): 82W
• Operating Temperature: 25°C ~ 125°C
• Package / Case: Pentawatt-5 HV (Bent and Staggered Leads)
• Output Voltage: 4.5 V
• Output Current: 600 uA
• Output Power: 82 W
• Input Voltage: 12.6 V to 13.4 V
• Switching Frequency: 200 KHz
• Mounting Style: Through Hole
• No. Of Pins: 5
• Ic Generic Number: 100
• Output Current Max: 5.3A
• Frequency: 200kHz
• Leaded Process Compatible: Yes
• Output Current Min: 3A
• Rohs Compliant: Yes
• Pwm Type: Current Mode PWM Controller
• Number Of Pwm Outputs: 1
• On/off Pin: No
• Adjustable Output: No
• Switching Freq: 90 TO 110kHz
• Operating Supply Voltage (max): 15V
• Synchronous Pin: No
• Rise Time: 50ns
• Fall Time: 100ns
• Mounting: Through Hole
• Pin Count: 5 +Tab
• Package Type: Pentawatt
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-4687-5

7 Layout
7
7.1
Figure 24. Recommended Layout
22/31
diodes bridge
From input
Layout
Layout Considerations
Some simple rules insure a correct running of switching power supplies. They may be
classified into two categories:
In case of VIPer, these rules apply as shown on
–
–
–
–
–
Minimizing power loops: The switched power current must be carefully analysed and
the corresponding paths must be as small an inner loop area as possible. This avoids
radiated EMC noises, conducted EMC noises by magnetic coupling, and provides a
better efficiency by eliminating parasitic inductances, especially on secondary side.
Using different tracks for low level and power signals: Interference due to mixing of
signal and power may result in instabilities and/or anomalous behavior of the device
in case of violent power surge (Input overvoltages, output short circuits...).
Loops C1-T1-U1, C5-D2-T1, and C7-D1-T1 must be minimized.
C6 must be as close as possible to T1.
Signal components C2, ISO1, C3, and C4 are using a dedicated track connected
directly to the power source of the device.
C1
R1
C2
U1
VIPerXX0
OSC
13V
ISO1
VDD
+
-
C3
COMP
R2
C4
SOURCE
DRAIN
(see Figure
C5
D2
T1
C6
24).
D1
FC00500
C7
filtering and load
VIPer100A-E/ASP-E
To secondary