LTC4006EGN-2 Linear Technology, LTC4006EGN-2 Datasheet - Page 18

IC CHARGER BATTERY 4A 16-SSOP

LTC4006EGN-2

Manufacturer Part Number
LTC4006EGN-2
Description
IC CHARGER BATTERY 4A 16-SSOP
Manufacturer
Linear Technology
Datasheet

Specifications of LTC4006EGN-2

Function
Charge Management
Battery Type
Lithium-Ion (Li-Ion)
Voltage - Supply
6 V ~ 28 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SSOP (0.150", 3.90mm Width)
Output Current
4A
Output Voltage
12.6V
Operating Supply Voltage (min)
6V
Operating Supply Voltage (max)
28V
Operating Temp Range
-40C to 85C
Package Type
SSOP N
Mounting
Surface Mount
Pin Count
16
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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LTC4006
APPLICATIO S I FOR ATIO
4. Place the output current sense resistor right next to
5. Place output capacitors next to the sense resistor
6. Output capacitor ground connections need to feed
General Rules
7. Connection of switching ground to system ground or
18
the inductor output but oriented such that the IC’s
current sense feedback traces going to resistor are not
long. The feedback traces need to be routed together
as a single pair on the same layer at any given time with
smallest trace spacing possible. Locate any filter
component on these traces next to the IC and not at the
sense resistor location.
output and ground.
into same copper that connects to the input capacitor
ground before tying back into system ground.
internal ground plane should be single point. If the
system has an internal system ground plane, a good
way to do this is to cluster vias into a single star point
to make the connection.
U
U
W
Figure 14. Kelvin Sensing of Charging Current
U
DIRECTION OF CHARGING CURRENT
CSP
R
SNS
8. Route analog ground as a trace tied back to IC ground
9. A good rule of thumb for via count for a given high
10. If possible, place all the parts listed above on the same
11. Copper fills or pours are good for all power connec-
12. For best current programming accuracy provide a
It is important to keep the parasitic capacitance on the R
CSP and BAT pins to a minimum. The traces connecting
these pins to their respective resistors should be as short
as possible.
BAT
(analog ground pin if present) before connecting to
any other ground. Avoid using the system ground
plane. CAD trick: make analog ground a separate
ground net and use a 0Ω resistor to tie analog ground
to system ground.
current path is to use 0.5A per via. Be consistent.
PCB layer.
tions except as noted above in Rule 3. You can also use
copper planes on multiple layers in parallel too—this
helps with thermal management and lower trace in-
ductance improving EMI performance further.
Kelvin connection from R
Figure 13 as an example.
4006 F14
SENSE
to CSP and BAT. See
4006fa
T
,

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