LTC1759CG Linear Technology, LTC1759CG Datasheet - Page 22

IC SMART BATTERY CHARGER 36SSOP

LTC1759CG

Manufacturer Part Number
LTC1759CG
Description
IC SMART BATTERY CHARGER 36SSOP
Manufacturer
Linear Technology
Datasheet

Specifications of LTC1759CG

Function
Charge Management
Battery Type
Smart Batteries
Voltage - Supply
11 V ~ 24 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
36-SSOP (0.200", 5.30mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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OPERATIO
APPLICATIONS
Adapter Limiting
An important feature of the LTC1759 is the ability to
automatically adjust charging current to a level which
avoids overloading the wall adapter. This allows the prod-
uct to operate at the same time that batteries are being
charged without complex load management algorithms.
Additionally, batteries will automatically be charged at the
maximum possible rate of which the adapter is capable.
This feature is created by sensing total adapter output
current and adjusting charging current downward if a
preset adapter current limit is exceeded. True analog
control is used, with closed loop feedback ensuring that
adapter load current remains within limits. Amplifier CL1
in Figure 9 senses the voltage across R
between the CLP and CLN pins. When this voltage exceeds
92mV, the amplifier will override programmed charging
current to limit adapter current to 92mV/R
filter formed by 500
switching noise. If the current limit is not used, both CLP
and CLN pins should be connected to V
Setting Input Current Limit
To set the input current limit, you need to know the
minimum wall adapter current rating. Subtract 5% for the
input current limit tolerance and use that current to deter-
mine the resistor value.
LTC1759
When wake-up is asserted to the current DAC block, the
delta-sigma is then fixed at a value equal to 80mA, inde-
pendent of the I
Note:
The external resistor connected to the I
multiplied by 0.8 to compensate for the 80% maximum
duty cycle of the sigma-delta modulator. Note also that the
80% duty cycle converts the rise/fall time mismatches to
a small gain error, rather than a nonlinearity. The parasitic
22
R
I
Adapter Min Current – (Adapter Min Current • 5%)
LIMIT
S4
= 92mV/I
=
LIMIT
LIMIT
U
U
setting.
and 1 F is required to eliminate
INFORMATION
U
W
CC
SET
.
S4
S4
pin must be
, connected
. A lowpass
U
capacitance at the I
these errors small.
The Battery Monitor Block (PWR_FAIL)
Two internal resistor dividers compare the BAT2 terminal
to the DCIN terminal. When BAT2 is above 89% of the
voltage at DCIN the PWR_FAIL bit is set to 1. A small
amount of proportional hysteresis, ~ 2%, is used for noise
immunity. The PWR_FAIL bit is set low if AC_PRESENT
is low.
Table 7. Common R
* Values shown above are rounded to nearest standard value.
As is often the case, the wall adapter will usually have at
least a +10% current limit margin and many times one can
simply set the adapter current limit value to the actual
adapter rating (see Table 7).
*R
RATING (A)
ADAPTER
S4
=
1.5
1.8
2.3
2.5
2.7
2
3
ADAPTER CURRENT LIMIT
CL1
LTC1759
92mV
+
Figure 9. Adapter Current Limiting
R
S4
92mV
( ) 1%
0.045
0.039
0.036
0.033
0.06
0.05
0.03
S4
VALUE*
+
SET
Resistor Values
pin should be minimized to keep
CLP
CLN
V
CC
+
DISSIPATION (W)
R
C
S4
IN
0.135
0.162
0.206
0.225
0.241
1 F
0.18
0.27
POWER
R
S4
500
*
R
RATING (W)
S4
AC ADAPTER
0.25
0.25
0.25
0.25
POWER
0.5
0.5
0.5
INPUT
1759 F09
V
IN

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