ISL88731CHRTZ-T Intersil, ISL88731CHRTZ-T Datasheet - Page 19

• Manufacturer Part Number: ISL88731CHRTZ-T
• Description: IC BATT CHRGR SMBUS LVL2 28TQFN
• Manufacturer: Intersil

Specifications of ISL88731CHRTZ-T

• Function: Charge Management
• Battery Type: Lithium-Ion (Li-Ion)
• Voltage - Supply: 8 V ~ 26 V
• Operating Temperature: -10°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 28-WFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Ensure that the required total gate drive current for the selected
MOSFETs should be less than 24mA. Thus, the total gate charge
for the high-side and low-side MOSFETs is limited by Equation 11:
Where I
than 24mA. Substituting I
Equation 11 yields that the total gate charge should be less than
80nC. Therefore, the ISL88731C easily drives the battery charge
current up to 8A.
Snubber Design
ISL88731C's buck regulator operates in discontinuous current
mode (DCM) when the load current is less than half the
peak-to-peak current in the inductor. After the low-side FET turns
off, the phase voltage rings due to the high impedance with both
FETs off. This can be seen in Figure 11. Adding a snubber
(resistor in series with a capacitor) from the phase node to
ground can greatly reduce the ringing. In some situations, a
snubber can improve output ripple and regulation.
The snubber capacitor should be approximately twice the
parasitic capacitance on the phase node. This can be estimated
by operating at very low load current (100mA) and measuring the
ringing frequency.
C
Input Capacitor Selection
The input capacitor absorbs the ripple current from the
synchronous buck converter, which is given by Equation 14:
This RMS ripple current must be smaller than the rated RMS
current in the capacitor data sheet. Non-tantalum chemistries
(ceramic, aluminum, or OSCON) are preferred due to their
resistance to power-up surge currents when the AC-adapter is
plugged into the battery charger. For Notebook battery charger
applications, it is recommended that ceramic capacitors or
polymer capacitors from Sanyo be used due to their small size
and reasonable cost.
Loop Compensation Design
ISL88731C has three closed loop control modes. One controls
the output voltage when the battery is fully charged or absent. A
second controls the current into the battery when charging and
the third limits current drawn from the adapter. The charge
current and input current control loops are compensated by a
single capacitor on the ICOMP pin. The voltage control loop is
compensated by a network on the VCOMP pin. Descriptions of
these control loops and guidelines for selecting compensation
Q
R
C
I
SNUB
GATE
SNUB
rms
SNUB
=
≤
and R
=
I
GATE
=
BAT
I
--------------
GATE
F
----------------------------------- -
(
SW
2πF
---------------- -
C
2 L ⋅
SNUB
SNUB
is the total gate drive current and should be less
V
ring
2
OUT
)
can be calculated from Equations 12 and 13:
2
L ⋅
(
V
V
IN
IN
−
GATE
V
OUT
19
= 24mA and f
)
s
= 400kHz into
ISL88731C
(EQ. 12)
(EQ. 13)
(EQ. 11)
(EQ. 14)
components will be given in the following sections. Which loop
controls the output is determined by the minimum current buffer
and the minimum voltage buffer shown in the “FUNCTIONAL
BLOCK DIAGRAM” on page 2. These three loops will be described
separately.
Transconductance Amplifiers GMV, GMI and
GMS
ISL88731C uses several transconductance amplifiers (also
known as gm amps). Most commercially available op amps are
voltage controlled voltage sources with gain expressed as
A = V
with gain expressed as gm = I
the equations for poles and zeros in the compensation.
PWM Gain F
The Pulse Width Modulator in the ISL88731C converts voltage at
VCOMP to a duty cycle by comparing VCOMP to a triangle wave
(duty = VCOMP/V
convert the duty cycle to a DC output voltage (Vo = V
ISL88731C, the triangle wave amplitude is proportional to V
Making the ramp amplitude proportional to DCIN makes the gain
from VCOMP to the PHASE output a constant 11 and is independent
of DCIN. For small signal AC analysis, the battery is modeled by its
internal resistance. The total output resistance is the sum of the sense
resistor and the internal resistance of the MOSFETs, inductor and
capacitor. Figure 22 shows the small signal model of the pulse width
modulator (PWM), power stage, output filter and battery.
In most cases the Battery resistance is very small (<200mΩ)
resulting in a very low Q in the output filter. This results in a
frequency response from the input of the PWM to the inductor
current with a single pole at the frequency calculated in
Equation 15:
F
POLE1
V
GAIN = 11
INPUT
PWM
RAMP
OUT
PWM
RAMP GEN
INPUT
=
PWM
/V
= V
(
------------------------------------------------------------------------------------ -
11
RS2
IN
ADAPTER
. gm amps are voltage controlled current sources
FIGURE 22. SMALL SIGNAL AC MODEL
+
-
+
R
P-P RAMP
m
FET_RDSON
r
/11
DS ON
(
2π L ⋅
)
). The low-pass filter formed by L and C
+
R
DCR
L
OUT
V
+
ADAPTER
/V
R
R
IN
BAT
L_DCR
. gm will appear in some of
)
L
R
RS2
C
C
ESR
O
O
DCIN
February 8, 2011
*duty). In
DCIN
FN6978.2
R
(EQ. 15)
BAT
.
O