ISL88731CHRTZ-T Intersil, ISL88731CHRTZ-T Datasheet - Page 21

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ISL88731CHRTZ-T

Manufacturer Part Number
ISL88731CHRTZ-T
Description
IC BATT CHRGR SMBUS LVL2 28TQFN
Manufacturer
Intersil
Datasheet

Specifications of ISL88731CHRTZ-T

Function
Charge Management
Battery Type
Lithium-Ion (Li-Ion)
Voltage - Supply
8 V ~ 26 V
Operating Temperature
-10°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
28-WFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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The loop response equations, bode plots and the selection of
C
gain reduced by the duty cycle and the ratio of R
words, if R
be 6dB lower than the loop gain in Figure 25. This gives lower
crossover frequency and higher phase margin in this mode. If
R
loop gain will be identical to the gain in Figure 25.
A filter should be added between R
reduce switching noise. The filter roll off frequency should be
between the cross over frequency and the switching frequency
(~100kHz).
Voltage Control Loop
When the battery is charged to the voltage set by ChargeVoltage
register, the voltage error amplifier (GMV) takes control of the
output (assuming that the adapter current is below the limit set
by ACLIM). The voltage error amplifier (GMV) discharges the cap
on VCOMP to limit the output voltage. The current to the battery
decreases as the cells charge to the fixed voltage and the voltage
across the internal battery resistance decreases. As battery
current decreases the 2 current error amplifiers (GMI and GMS)
output their maximum current and charge the capacitor on
ICOMP to its maximum voltage (limited to 0.3V above VCOMP).
With high voltage on ICOMP, the minimum voltage buffer output
equals the voltage on VCOMP.
The voltage control loop is shown in Figure 26.
Output LC Filter Transfer Functions
The gain from the phase node to the system output and battery
depend entirely on external components. Typical output LC filter
response is shown in Figure 27. Transfer function A
in Equation 22:
ICOMP
S1
/R
VCOMP
are the same as the charge current control loop with loop
S2
C
R
VCOMP
VCOMP
= 2 and the duty cycle is 50% then the adapter current
S1
Σ Σ
S
= R
FIGURE 26. VOLTAGE CONTROL LOOP
S2
11
0.25
and the duty cycle D = 50%, the loop gain will
GMV
-
+
+
-
DACV
PHASE
21
R
CA2
FET_RDSON
R4
20x
R3
S1
+
-
and CSIP and CSIN to
CSOP
CSON
L
S1
R
L_DCR
C
C
R
/R
LC
F2
O
ESR
(s) is shown
S2
R
F2
. In other
ISL88731C
R
R
S2
BAT
The resistance R
DCR, R
between 50mΩ and 200mΩ) The worst case for voltage mode
control is when the battery is absent. This results in the highest Q
of the LC filter and the lowest phase margin.
The compensation network consists of the voltage error amplifier
GMV and the compensation network R
the loop very high DC gain, a very low frequency pole and a zero
at F
to create a second zero F
between R
are internal divider resistors that set the DC output voltage. For a
3-cell battery, R
equations relate the compensation network’s poles, zeros and
gain to the components in Figure 26. Figure shows an
asymptotic Bode plot of the DC/DC converter’s gain vs.
frequency. It is strongly recommended that F
approximately 30% of F
A
ω
LC
ESR
FIGURE 27. FREQUENCY RESPONSE OF THE LC OUTPUT FILTER
ZERO1
=
SENSE
=
-------------------------------------------------------- -
---------- -
ω
s
-----------------------------
(
DP
. Inductor current information is added to the feedback
2
R
R
S2
ESR
BATTERY
+
1
and the internal resistance of the battery (normally
and ISL88731C add a pole at F
1
---------------------- -
(
ω
3
------------- -
ω
O
C
LC
= 500kΩ and R
ESR
o
s
is a combination of MOSFET r
s
)
= 200m Ω
R
Q
BATTERY
)
ω
+
LC
FREQUENCY (Hz)
LC
ZERO2
1
and F
=
---------------------- -
(
= 50m Ω
. The low pass filter R
ZERO2
L C
4
1
= 100kΩ. The following
o
is approximately 70% of F
)
VCOMP
Q
NO BATTERY
=
, C
FILTER
ZERO1
R
VCOMP
DS(ON)
o
is
. R
February 8, 2011
----- -
C
F2
L
o
3
which give
, inductor
, C
and R
FN6978.2
F2
(EQ. 22)
4
LC
.

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