PCF85162T/1,118 NXP Semiconductors, PCF85162T/1,118 Datasheet - Page 33

IC LCD DISPLAY DVR 32SEG 48TSSOP

PCF85162T/1,118

Manufacturer Part Number
PCF85162T/1,118
Description
IC LCD DISPLAY DVR 32SEG 48TSSOP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PCF85162T/1,118

Package / Case
48-TSSOP
Display Type
LCD
Configuration
32 Segment
Interface
I²C
Digits Or Characters
Any Digit Type
Current - Supply
8µA
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Number Of Digits
16
Number Of Segments
128
Maximum Clock Frequency
400 KHz
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Power Dissipation
400 mW
Maximum Operating Temperature
+ 85 C
Attached Touch Screen
No
Maximum Supply Current
50 mA
Minimum Operating Temperature
- 40 C
Dc
1123
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-5059-2
NXP Semiconductors
PCF85162_2
Product data sheet
Table 19.
The PCF85162 can always be cascaded with other devices of the same type or
conditionally with other devices of the same family. This allows optimal drive selection for
a given number of pixels to display.
synchronization signals.
In a cascaded configuration only one PCF85162 master must be used as clock source. All
other PCF85162 in the cascade must be configured as slave such that they receive the
clock from the master.
If an external clock source is used, all PCF85162 in the cascade must be configured such
as to receive the clock from that external source (pin OSC connected to V
must be ensured that the clock tree is designed such that on all PCF85162 the clock
propagation delay from the clock source to all PCF85162 in the cascade is as equal as
possible since otherwise synchronization artefacts may occur.
In mixed cascading configurations, care has to be taken that the specifications of the
individual cascaded devices are met at all times.
Number of devices
2
3 to 5
6 to 10
10 to 16
SYNC contact resistance
All information provided in this document is subject to legal disclaimers.
Rev. 02 — 7 May 2010
Figure 21
Universal LCD driver for low multiplex rates
Maximum contact resistance
6 kΩ
2.2 kΩ
1.2 kΩ
700 Ω
and
Figure 24
show the timing of the
PCF85162
© NXP B.V. 2010. All rights reserved.
DD
). Thereby it
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