ICL7136CPLZ Intersil, ICL7136CPLZ Datasheet - Page 6

IC ADC 3.5DIGIT LCD LP 40DIP

ICL7136CPLZ

Manufacturer Part Number
ICL7136CPLZ
Description
IC ADC 3.5DIGIT LCD LP 40DIP
Manufacturer
Intersil
Datasheet

Specifications of ICL7136CPLZ

Display Type
LCD
Configuration
7 Segment
Digits Or Characters
A/D 3.5 Digits
Current - Supply
70µA
Voltage - Supply
4 V ~ 6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
40-DIP (0.600", 15.24mm)
Package
40PDIP
Resolution
3 1/2 Digit
Sampling Rate
3 SPS
Architecture
Dual Slope
Number Of Analog Inputs
1
Digital Interface Type
LCD
Input Type
Voltage
Polarity Of Input Voltage
Bipolar
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Interface
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ICL7136CPLZ
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Quantity:
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Part Number:
ICL7136CPLZ
Manufacturer:
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Quantity:
20 000
Pin Descriptions
Detailed Description
Analog Section
Figure 2 shows the Analog Section for the ICL7136. Each
measurement cycle is divided into four phases. They are (1)
auto-zero (A-Z), (2) signal integrate (INT) and (3) de-
integrate (DE), (4) zero integrate (ZI).
Auto-Zero Phase
During auto-zero three things happen. First, input high and low
are disconnected from the pins and internally shorted to analog
40 PIN DIP
10
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
11
1
2
3
4
5
6
7
8
9
PIN NUMBER
FLATPACK
44 PIN
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
34
35
36
37
38
39
40
41
42
43
44
8
9
3
4
6
7
COMMON
BP/GND
REF LO
REF HI
6
C
NAME
C
OSC3
OSC2
OSC1
BUFF
IN LO
TEST
IN HI
POL
AB4
REF
INT
A-Z
G1
G3
G2
REF
V+
D1
C1
B1
A1
E1
D2
C2
B2
A2
E2
D3
B3
E3
A3
C3
F1
F2
F3
V
-
+
-
FUNCTION
Supply/
Supply
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Supply
Output
Output
Output
Output
Output
Input
Input
Input
Input
Input
Power Supply.
Driver pin for the negative sign of the display.
Negative power supply.
Driver Pin for Segment “D” of the display units digit.
Driver Pin for Segment “C” of the display units digit.
Driver Pin for Segment “B” of the display units digit.
Driver Pin for Segment “A” of the display units digit.
Driver Pin for Segment “F” of the display units digit.
Driver Pin for Segment “G” of the display units digit.
Driver Pin for Segment “E” of the display units digit.
Driver Pin for Segment “D” of the display tens digit.
Driver Pin for Segment “C” of the display tens digit.
Driver Pin for Segment “B” of the display tens digit.
Driver Pin for Segment “A” of the display tens digit.
Driver Pin for Segment “F” of the display tens digit.
Driver Pin for Segment “E” of the display tens digit.
Driver pin for segment “D” of the display hundreds digit.
Driver pin for segment “B” of the display hundreds digit.
Driver pin for segment “F” of the display hundreds digit.
Driver pin for segment “E” of the display hundreds digit.
Driver pin for both “A” and “B” segments of the display thousands digit.
Driver pin for the LCD backplane/Power Supply Ground.
Driver pin for segment “G” of the display hundreds digit.
Driver pin for segment “A” of the display hundreds digit.
Driver pin for segment “C” of the display hundreds digit.
Driver pin for segment “G” of the display tens digit.
Integrator amplifier output. To be connected to integrating capacitor.
Input buffer amplifier output. To be connected to integrating resistor.
Integrator amplifier input. To be connected to auto-zero capacitor.
Differential inputs. To be connected to input voltage to be measured. LO and HI
designators are for reference and do not imply that LO should be connected to lower
potential, e.g., for negative inputs IN LO has a higher potential than IN HI.
Internal voltage reference output.
Connection pins for reference capacitor.
Input pins for reference voltage to the device. REF HI should be positive reference to
REF LO.
Display test. Turns on all segments when tied to V+.
Device clock generator circuit connection pins.
ICL7136
COMMON. Second, the reference capacitor is charged to the
reference voltage. Third, a feedback loop is closed around the
system to charge the auto-zero capacitor C
for offset voltages in the buffer amplifier, integrator, and
comparator. Since the comparator is included in the loop, the A-
Z accuracy is limited only by the noise of the system. In any
case, the offset referred to the input is less than 10µV.
Signal Integrate Phase
During signal integrate, the auto-zero loop is opened, the
internal short is removed, and the internal input high and low
DESCRIPTION
AZ
to compensate
July 21, 2005
FN3086.6

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