PCF8562TT/2,118 NXP Semiconductors, PCF8562TT/2,118 Datasheet - Page 27

• Manufacturer Part Number: PCF8562TT/2,118
• Description: IC LCD DRIVER 32/128SEG 48-TSSOP
• Manufacturer: NXP Semiconductors

Specifications of PCF8562TT/2,118

• Package / Case: 48-TSSOP
• Display Type: LCD
• Configuration: 7 Segment + DP, 14 Segment (32 Segment)
• Interface: I²C
• Current - Supply: 32µA
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Number Of Digits: 16
• Number Of Segments: 32
• Maximum Clock Frequency: 2640 Hz
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Power Dissipation: 400 mW
• Maximum Operating Temperature: + 85 C
• Attached Touch Screen: No
• Maximum Supply Current: 20 uA
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: OM6292 - DEMO BOARD PCA2125 RTCOM10088 - KIT FOR LCD DEMO LPC900622-1003 - KIT FOR LCD DEMO
• Digits Or Characters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-2029-2; PCF8562TT/2,518; PCF8562TT/2-T

NXP Semiconductors
10. Static characteristics
Table 16.
V
[1]
[2]
[3]
[4]
[5]
[6]
PCF8562_5
Product data sheet
Symbol
Supplies
V
V
I
I
Logic
V
V
V
I
I
I
I
C
LCD outputs
ΔV
R
DD
DD(LCD)
OL
OH(CLK)
L
L(OSC)
DD
DD
LCD
P(POR)
IL
IH
I
O
O
= 1.8 V to 5.5 V; V
V
LCD outputs are open-circuit; inputs at V
When tested, I
too).
Propagation delay of driver between clock (CLK) and LCD driving signals.
Periodically sampled, not 100 % tested.
Outputs measured one at a time.
LCD
> 3 V for
Static characteristics
Parameter
supply voltage
LCD supply voltage
supply current
LCD supply current
power-on reset supply voltage
LOW-level input voltage
HIGH-level input voltage
LOW-level output current
HIGH-level output current on pin CLK
leakage current
leakage current on pin OSC
input capacitance
output voltage variation
output resistance
1
2
⁄
C pins SCL and SDA have no diode to V
3
bias.
SS
= 0 V; V
LCD
= 2.5 V to 6.5 V; T
SS
All information provided in this document is subject to legal disclaimers.
or V
DD
; external clock with 50 % duty factor; I
Rev. 05 — 19 May 2010
Conditions
f
f
on pins CLK, SYNC,
OSC, A0 to A2, SA0,
SCL, SDA
on pins CLK, SYNC,
OSC, A0 to A2, SA0,
SCL, SDA
V
V
V
on pins CLK, SCL, SDA,
A0 to A2 and SA0
V
on pins BP0 to BP3 and
S0 to S31
V
clk
clk
DD
OL
OH
I
I
LCD
on pins CLK and SYNC
on pin SDA
on pins BP0 to BP3
on pins S0 to S31
amb
= V
= V
= 1536 Hz
= 1536 Hz
and may be driven to the V
= 0.4 V; V
= 4.6 V; V
= 5 V
DD
DD
=
−
or V
40
°
SS
C to +85
DD
DD
;
= 5 V
= 5 V
Universal LCD driver for low multiplex rates
°
C; unless otherwise specified.
I
[1]
[2]
[2]
[3][4]
[5]
[6]
limiting values given in
2
C-bus inactive.
Min
1.8
2.5
-
-
1.0
V
0.7V
1
3
−1
−1
−1
-
−100
-
-
SS
DD
Typ
-
-
8
24
1.3
-
-
-
-
-
-
-
-
-
1.5
6.0
Table 15
PCF8562
© NXP B.V. 2010. All rights reserved.
Max
5.5
6.5
20
60
1.6
0.3V
V
-
-
-
+1
+1
7
+100
-
-
DD
(see
DD
Figure 17
27 of 37
Unit
V
V
μA
μA
V
V
V
mA
mA
mA
μA
μA
pF
mV
kΩ
kΩ