FAN7390MX Fairchild Semiconductor, FAN7390MX Datasheet - Page 14

IC DRIVER GATE HI/LO SIDE 8-SOP

FAN7390MX

Manufacturer Part Number
FAN7390MX
Description
IC DRIVER GATE HI/LO SIDE 8-SOP
Manufacturer
Fairchild Semiconductor
Type
High Side/Low Sider
Datasheet

Specifications of FAN7390MX

Configuration
High and Low Side, Synchronous
Input Type
Non-Inverting
Delay Time
140ns
Current - Peak
4.5A
Number Of Configurations
1
Number Of Outputs
2
High Side Voltage - Max (bootstrap)
600V
Voltage - Supply
10 V ~ 22 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Product
Driver ICs - Various
Rise Time
50 ns
Fall Time
50 ns
Supply Voltage (min)
10 V
Maximum Power Dissipation
625 mW
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Bridge Type
Half Bridge
Minimum Operating Temperature
- 40 C
Number Of Drivers
2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
FAN7390MXTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
FAN7390MX
Manufacturer:
FAIRCHILD
Quantity:
8 000
Part Number:
FAN7390MX
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
Part Number:
FAN7390MX
0
© 2008 Fairchild Semiconductor Corporation
FAN7390 Rev. 1.0.3
Physical Dimensions
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
NOTES:
A) THIS DRAWING COMPLIES WITH JEDEC MS-012
B) THIS DIMENSION IS OUTSIDE THE JEDEC MS-012 VALUE.
C) ALL DIMENSIONS ARE IN MILLIMETERS.
D) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH,
E) LANDPATTERN STANDARD: SOIC127P600X145-14M
F) DRAWING FILE NAME AND REVISION : M14CREV1
6.00
INDICATOR
EXCEPT AS NOTED.
AND TIE BAR EXTRUSIONS.
PIN ONE
1.80 MAX
(0.27)
1.65
1.45
B
Figure 32. 14-Lead Small Outline Integrated Circuit Package (SOIC)
14
#1
(Continued)
SIDE VIEW
TOP VIEW
1.27
8.76
8.36
7.62
1.27
8
7
0.51
0.36
0.20
0.10 MAX C
A
B
0.05MIN
14
C
4.15
3.75
C B A
B
0.36
LAND PATTERN RECOMMENDATION
(R0.20)
PLANE
1.70
GAGE
#1
SEATING
PLANE
END VIEW
DETAIL A
1.27
SEE DETAIL A
8¡Æ
(R0.10)
www.fairchildsemi.com
0.90
0.50
0.65
0.30
0.15
5.60
B

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