IRS2336SPBF International Rectifier, IRS2336SPBF Datasheet

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IRS2336SPBF

Manufacturer Part Number
IRS2336SPBF
Description
IC DRIVER BRIDGE 3-PHASE 28-SOIC
Manufacturer
International Rectifier
Datasheet

Specifications of IRS2336SPBF

Configuration
3 Phase Bridge
Input Type
Differential
Delay Time
530ns
Current - Peak
200mA
Number Of Configurations
1
Number Of Outputs
3
High Side Voltage - Max (bootstrap)
600V
Voltage - Supply
10 V ~ 20 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
Typical Applications
www.irf.com
Typical Connection Diagram
Drives up to six IGBT/MOSFET power devices
Gate drive supplies up to 20 V per channel
Integrated bootstrap functionality (IRS2336(4)D)
Over-current protection
Over-temperature shutdown input
Advanced input filter
Integrated deadtime protection
Shoot-through (cross-conduction) protection
Undervoltage lockout for V
Enable/disable input and fault reporting
Adjustable fault clear timing
Separate logic and power grounds
3.3 V input logic compatible
Tolerant to negative transient voltage
Designed for use with bootstrap power supplies
Matched propagation delays for all channels
-40° C to 125° C operating range
RoHS compliant
Lead-Free
Appliance motor drives
Servo drives
Micro inverter drives
General purpose three phase inverters
CC
& V
BS
HIGH VOLTAGE 3 PHASE GATE DRIVER IC
Product Summary
Package Options
Topology
V
V
I
t
Deadtime (typical)
o+
ON
OFFSET
OUT
28-Lead PDIP
48-Lead MLPQ7X7
& I
(without 14 leads)
& t
o-
OFF
(typical)
(typical)
IRS2336(D)
IRS23364D
28-Lead SOIC Wide Body
(without 12 leads)
44-Lead PLCC
© 2009 International Rectifier
200 mA & 350 mA
530 ns & 530 ns
IRS2336(D)
IRS23364D
11.5 V – 20 V
10 V – 20 V
3 Phase
275 ns
October 16, 2009
600 V

Related parts for IRS2336SPBF

IRS2336SPBF Summary of contents

Page 1

... Deadtime (typical) Package Options 28-Lead PDIP 48-Lead MLPQ7X7 (without 14 leads) October 16, 2009 IRS2336(D) IRS23364D 3 Phase 600 V IRS2336( – IRS23364D 11.5 V – (typical) 200 mA & 350 mA (typical) 530 ns & 530 ns 275 ns 28-Lead SOIC Wide Body 44-Lead PLCC (without 12 leads) © 2009 International Rectifier ...

Page 2

... Input/Output Pin Equivalent Circuit Diagram Lead Definitions Lead Assignments Application Information and Additional Details Parameter Temperature Trends Package Details Tape and Reel Details Part Marking Information Ordering Information www.irf.com IRS2336x(D) Family 2 Page 8-9 10 11-12 13-14 15-16 17 18-34 35-38 39-42 43- © 2009 International Rectifier ...

Page 3

... HIN, LIN www.irf.com Proprietary HVIC and latch immune CMOS technologies have been Fault conditions are cleared automatically after a delay UVLO V IT,TH 8.9 V/ 8.2 V 0.46 V 11.1 V/ 10 IRS2336x(D) Family OFF OUT 530 ns, 530 – 530 ns, 530 ns 11.5 V – © 2009 International Rectifier ...

Page 4

... Simplified Block Diagram Typical Application Diagram www.irf.com IRS2336x(D) Family ≤ 4 © 2009 International Rectifier ...

Page 5

... Charged Device Model IC Latch-Up Test RoHS Compliant † Qualification standards can be found at International Rectifier’s web site †† Higher qualification ratings may be available should the user have such requirements. Please contact your International Rectifier sales representative for further information. ††† ...

Page 6

... V +0 † -0.3 620 † V +0 -0 COM-0 -0 - V/ns — 500 — 1.5 — 1.6 — 2.0 — 2.0 — 83 — 78 — ºC/W 63 — 63 — 150 — -55 150 300 — © 2009 International Rectifier ºC ...

Page 7

... Definition IRS2336(D) IRS23364D IRS2336(D) IRS23364D IRS2336(D) IRS23364D † †† with pulse width. Guaranteed by design. Refer IRS2336x(D) Family Min Max + +11 COM-8 600 -50 600 COM -40 125 of – –V . Please refer to Design Tip S BS © 2009 International Rectifier Units V ºC ...

Page 8

... V — 5.2 5.65 150 200 120 165 110 150 1 — µA 150 200 120 165 110 150 1 — 8 — — 1 µA V — RCIN 50 100 © 2009 International Rectifier SS . The V SS BSUV 600 V S off state V µs =15 V µ 100 µ ...

Page 9

... IRS2336(D) 5 — IRS23364D 5 — — — — — — 0.8 IRS2336(D) 5 — IRS23364D 120 — — — — 50 — (IRS2336(4)D) 200 9 Units Test Conditions 0.55 — — µ 2 — 165 µ 100 — © 2009 International Rectifier ...

Page 10

... OUT 10 IRS2336x(D) Family Max Units Test Conditions 750 750 190 & 510 650 IN — ITRIP 1200 ITRIP — 950 ITRIP 420 & without ns IN external deadtime & with external IN 50 deadtime larger than input=10 µs © 2009 International Rectifier ...

Page 11

... Functional Block Diagram: IRS2336(D) Note: IRS2336 is without the “Integrated BootFET” www.irf.com IRS2336x(D) Family 11 © 2009 International Rectifier ...

Page 12

... Functional Block Diagram: IRS23364D www.irf.com IRS2336x(D) Family 12 © 2009 International Rectifier ...

Page 13

... Input/Output Pin Equivalent Circuit www.irf.com IRS2336x(D) Family Diagrams: IRS2336(D) 13 © 2009 International Rectifier ...

Page 14

... Input/Output Pin Equivalent Circuit www.irf.com IRS2336x(D) Family Diagrams: IRS23364D 14 © 2009 International Rectifier ...

Page 15

... FLTCLR An external RC network input used to define the FAULT CLEAR delay (t equal to R*C. When RCIN > the FAULT pin goes back into an open-drain high-impedance RCIN state. www.irf.com Description , then automatically becomes inactive (open-drain high impedance). 15 IRS2336x(D) Family ) approximately FLTCLR © 2009 International Rectifier ...

Page 16

... FLTCLR An external RC network input used to define the FAULT CLEAR delay (t equal to R*C. When RCIN > the FAULT pin goes back into an open-drain high-impedance RCIN state. www.irf.com Description , then automatically becomes inactive (open-drain high impedance). 16 IRS2336x(D) Family ) approximately FLTCLR © 2009 International Rectifier ...

Page 17

... Lead Assignments VS1 1 HO1 2 VB1 3 VCC 4 HIN1 5 HIN2 6 HIN3 7 n.c. 8 www.irf.com IRS2336x(D) Family IRS2336(D) 28 n.c. 27 n.c. 26 n.c. 25 LO1 34 Lead 24 LO2 MLPQ 23 LO3 22 COM 21 n.c. 20 VSS 19 n.c. 17 © 2009 International Rectifier ...

Page 18

... OUT Figure 1: HVIC sourcing current www.irf.com IRS2336x(D) Family . The voltage that drives the gate of the external power switch is O for the low-side power switch; this parameter is sometimes LO Figure 2: HVIC sinking current 18 © 2009 International Rectifier ...

Page 19

... IC has received a command from the control IC to shutdown); this results in the outputs (HOx and LOx) being held in the low state until the enable pin is pulled high. www.irf.com IRS2336x(D) Family Figure 4: Switching time waveforms (IRS23364D) (see interval C in Figure 6); the RCIN, OUT ON © 2009 International Rectifier ...

Page 20

... IRS2336xD specifies the maximum difference between DT comparing the DT of one channel of the IRS2336xD to that of another. www.irf.com Figure 6: Detailed view of B & C intervals and IRS2336x(D) Family . The MDT parameter also applies when 2 © 2009 International Rectifier ...

Page 21

... IRS2336(D) and IRS23364D, its input threshold values, and the logic state of the result of the input signal. www.irf.com Figure 7: Illustration of deadtime ) of the IRS2336xD is matched to the propagation ON Figure 8: HIN & LIN input thresholds 21 IRS2336x(D) Family , t ) for both ON OFF © 2009 International Rectifier ...

Page 22

... CCUV- threshold, the IC will not turn-on. Additionally, if the V BSUV threshold during operation, the undervoltage lockout circuitry will recognize a fault Figure 9: UVLO protection 22 IRS2336x(D) Family (logic and low-side circuitry) power supply CC ( plotted over the undervoltage protection is enabled or BSUV+/- © 2009 International Rectifier BS ...

Page 23

... Table 2: Enable functionality truth table (*assumes no other fault condition) www.irf.com HO LO HIN for the details of its use. Table 2 gives a summary of this pin’s functionality EN * Figure 11: Output enable timing waveform 23 IRS2336x(D) Family IRS23364D LIN Please refer to the EN FILTER,EN © 2009 International Rectifier ...

Page 24

... SS is connected between the V and the RCIN pin, while C CC Figure 13: Programming the fault clear timer RCIN Ceramic 0 RCIN >> R ON,RCIN Table 3: Design guidelines -t/ -(R C )ln(1-V FLTCLR RCIN RCIN RCIN,TH 24 IRS2336x(D) Family is placed between RCIN / © 2009 International Rectifier CC ...

Page 25

... The voltage of the ITRIP pin should not be allowed to 0 and the ITRIP functionality by the time that IT,TH+ 25 IRS2336x(D) Family . SS ). The circuit designer will need to IT,TH and R such that the voltage the temperature changes, the 4 . The resistor values should X and D 1 © 2009 International Rectifier , ...

Page 26

... CC is not latched in this case and CCUV RCIN FAULT LO High 0 0 High High impedance LIN High High impedance LIN Low 0 0 High High impedance 0 ; the resulting output is approximately the FIL,IN ; the resulting output is FIL,IN © 2009 International Rectifier HIN 0 0 ...

Page 27

... This data illustrates the performance and near symmetry OUT IN 27 IRS2336x(D) Family Figure 18: Advanced input filter ; the output does not change states. Example 2 of duration. It can be seen that for a PW OUT durations mimic the PW durations very well over IN © 2009 International Rectifier ; the FIL, ...

Page 28

... In that case, the bootstrap MOSFET is designed to remain off until V CC concept is illustrated in Figure 23. www.irf.com Figure 20: IRS2336xD input filter characteristic , see Figure 22 for an illustration of this internal connection IRS2336x(D) Family CC voltage is higher than approximately 110% B returns below that threshold; this B © 2009 International Rectifier supply and ...

Page 29

... COM respectively) to eliminate some of the noise SS and COM pins and how these two grounds are used in the system. The SS -COM; the gate-emitter voltage ( G,LO 29 IRS2336x(D) Family in the figure is the voltage between the the low-side switch is the GE © 2009 International Rectifier ...

Page 30

... At the same instance, the voltage node V voltage to the negative DC bus voltage. www.irf.com Figure 24: Separate V and COM pins SS Figure 25: Three phase inverter 30 IRS2336x(D) Family swings from the positive DC bus S1 © 2009 International Rectifier ...

Page 31

... DC bus, rather it S and L for each IGBT. When the high-side switch is on (the load is not shown in these figures). This current flows from the S1 31 IRS2336x(D) Family transient”. S and the S1 pin). S © 2009 International Rectifier , S2 ...

Page 32

... International Rectifier’s HVICs have been designed for the robustness required in many of today’s demanding applications. The IRS2336xD has been seen to withstand large negative V for a period of 50 ns. An illustration of the IRS2336D’ ...

Page 33

... Figure 34: Antenna Loops A ceramic 1 F ceramic capacitor is suitable for most applications. This V cc HIN (x3) LIN (x3) EN FAULT C IN RCIN ITRIP V SS Figure 35: Supply capacitor 33 IRS2336x(D) Family ) between the V and (x3 (x3) V (x3 (x3) COM © 2009 International Rectifier pins. This ...

Page 34

... DT04-4: Using Monolithic High Voltage Gate Drivers AN-978: HV Floating MOS-Gate Driver ICs www.irf.com IRS2336x(D) Family spikes remain excessive, further steps S or less) between the V and V (see Figure 37). See DT04 Figure 37: V clamping diode S 34 pin and the switch S © 2009 International Rectifier ...

Page 35

... The individual data points on the curve were determined by 1000 800 600 400 200 0 75 100 125 o C) 1500 1200 900 600 300 0 75 100 125 IRS2336x(D) Family Exp. -50 - Temperature ( C) Figure 39: t vs. temperature OFF Exp. -50 - Temperature ( C) Figure 41: t vs. temperature ITRIP © 2009 International Rectifier 100 125 100 125 ...

Page 36

... 100 125 - -50 75 100 125 36 IRS2336x(D) Family Exp. - Temperature ( C) Figure 43: t vs. temperature EN Exp. - 100 o Temperature ( C) Figure 45: MDT vs. temperature Exp. - Temperature ( C) Figure 47: I vs. temperature ITRIP+ © 2009 International Rectifier 100 125 125 100 125 ...

Page 37

... -50 75 100 125 37 IRS2336x(D) Family Exp. - Temperature ( C) Figure 49: I vs. temperature QBS Exp. - Temperature ( C) Figure 51: I vs. temperature O- Exp. - Temperature ( C) Figure 53: V vs. temperature CCUV- © 2009 International Rectifier 100 125 100 125 100 125 ...

Page 38

... Figure 55: V 800 600 400 200 0 -50 75 100 125 Figure 57: V 100 Exp -50 75 100 125 Figure 59 IRS2336x(D) Family - 100 o Temperature ( C) vs. temperature BSUV- Exp. - 100 o Temperature ( C) vs. temperature IT,TH- - 100 o Temperature ( C) vs. temperature ON,FLT © 2009 International Rectifier 125 125 125 ...

Page 39

... Package Details: PDIP28 www.irf.com IRS2336x(D) Family 39 © 2009 International Rectifier ...

Page 40

... Package Details: SOIC28W www.irf.com IRS2336x(D) Family 40 © 2009 International Rectifier ...

Page 41

... Package Details: PLCC44 www.irf.com IRS2336x(D) Family 41 © 2009 International Rectifier ...

Page 42

... Case outline drawing for: MLPQ7X7 www.irf.com IRS2336x(D) Family 42 © 2009 International Rectifier ...

Page 43

... IRS2336x(D) Family Max n/a A Max © 2009 International Rectifier ...

Page 44

... E 98.00 102.00 3.858 F n/a 38.4 n/a G 34.7 35.8 1.366 H 32.6 33.1 1.283 44 IRS2336x(D) Family Imperial Max 0.948 0.161 1.271 0.562 0.712 0.712 n/a 0.062 D A Imperial Max 13.001 0.844 0.519 0.096 4.015 1.511 1.409 1.303 © 2009 International Rectifier ...

Page 45

... D 1.95 2.45 0.767 E 98.00 102.00 3.858 F n/a 22.4 n/a G 18.5 21.1 0.728 H 16.4 18.4 0.645 45 IRS2336x(D) Family Max 0.476 0.161 0.641 0.299 0.289 0.289 n/a 0.062 A Max 13.001 0.844 0.519 0.096 4.015 0.881 0.83 0.724 © 2009 International Rectifier ...

Page 46

... Part Marking Information www.irf.com IRS2336x(D) Family 46 © 2009 International Rectifier ...

Page 47

... Tube/Bulk 27 Tape and Reel 500 Tube/Bulk 13 Tube/Bulk 25 Tape and Reel 1000 Tube/Bulk 27 Tape and Reel 500 47 Complete Part Number IRS2336DMPbF IRS2336DMTRPbF IRS2336DPbF IRS2336DSPbF IRS2336DSTRPbF IRS2336DJPbF IRS2336DJTRPbF IRS2336PbF IRS2336SPbF IRS2336STRPbF IRS2336JPbF IRS2336JTRPbF IRS23364DPbF IRS23364DSPbF IRS23364DSTRPbF IRS23364DJPbF IRS23364DJTRPbF © 2009 International Rectifier ...

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