ISL6594DCBZ

Manufacturer Part NumberISL6594DCBZ
DescriptionIC MOSFET DRVR SYNC BUCK 8-SOIC
ManufacturerIntersil
ISL6594DCBZ datasheet
 


Specifications of ISL6594DCBZ

ConfigurationHigh and Low Side, SynchronousInput TypePWM
Delay Time10.0nsCurrent - Peak1.25A
Number Of Configurations1Number Of Outputs2
High Side Voltage - Max (bootstrap)36VVoltage - Supply6.8 V ~ 13.2 V
Operating Temperature0°C ~ 85°CMounting TypeSurface Mount
Package / Case8-SOIC (3.9mm Width)Lead Free Status / RoHS StatusLead free / RoHS Compliant
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Data Sheet
Advanced Synchronous Rectified Buck
MOSFET Drivers with Protection Features
The ISL6594D is high frequency MOSFET driver specifically
designed to drive upper and lower power N-Channel
MOSFETs in a synchronous rectified buck converter
topology. This driver combined with the ISL6594D Digital
Multi-Phase Buck PWM controller and N-Channel MOSFETs
forms a complete core-voltage regulator solution for
advanced microprocessors.
The ISL6594D drives both upper and lower gates over a range
of 4.5V to 13.2V. This drive-voltage provides the flexibility
necessary to optimize applications involving trade-offs between
gate charge and conduction losses.
An advanced adaptive zero shoot-through protection is
integrated to prevent both the upper and lower MOSFETs
from conducting simultaneously and to minimize the dead
time. The ISL6594D includes an overvoltage protection
feature operational before VCC exceeds its turn-on
threshold, at which the PHASE node is connected to the
gate of the low side MOSFET (LGATE). The output voltage
of the converter is then limited by the threshold of the low
side MOSFET, which provides some protection to the
microprocessor if the upper MOSFET(s) is shorted.
The ISL6594D also features an input that recognizes a
high-impedance state, working together with Intersil multi-
phase PWM controllers to prevent negative transients on the
controlled output voltage when operation is suspended. This
feature eliminates the need for the Schottky diode that may
be utilized in a power system to protect the load from
negative output voltage damage.
Ordering Information
PART NUMBER
PART
TEMP.
(Note)
MARKING
RANGE (°C)
ISL6594DCBZ
6594 DCBZ
0 to +85
ISL6594DCBZ-T* 6594 DCBZ
0 to +85
ISL6594DCRZ
94DZ
0 to +85
ISL6594DCRZ-T* 94DZ
0 to +85
*Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets; molding compounds/die attach
materials and 100% matte tin plate PLUS ANNEAL - e3 termination
finish, which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the
Pb-free requirements of IPC/JEDEC J STD-020.
1
December 3, 2007
Features
• Dual MOSFET Drives for Synchronous Rectified Bridge
• Pin-to-pin Compatible with ISL6596
• Advanced Adaptive Zero Shoot-Through Protection
- Body Diode Detection
- Auto-zero of r
• Adjustable Gate Voltage for Optimal Efficiency
• 36V Internal Bootstrap Schottky Diode
• Bootstrap Capacitor Overcharging Prevention
• Supports High Switching Frequency (up to 2MHz)
- 3A Sinking Current Capability
- Fast Rise/Fall Times and Low Propagation Delays
• Optimized for 3.3V PWM Input
• Three-State PWM Input for Output Stage Shutdown
• Three-State PWM Input Hysteresis for Applications With
Power Sequencing Requirement
• Pre-POR Overvoltage Protection
• VCC Undervoltage Protection
• Expandable Bottom Copper Pad for Enhanced Heat
Sinking
• Dual Flat No-Lead (DFN) Package
- Near Chip-Scale Package Footprint; Improves PCB
Efficiency and Thinner in Profile
• Pb-Free (RoHS Compliant)
Applications
• Optimized for POL DC/DC Converters for IBA Systems
PACKAGE
PKG.
• Core Regulators for Intel® and AMD® Microprocessors
(Pb-free)
DWG. #
• High Current DC/DC Converters
8 Ld SOIC
M8.15
• High Frequency and High Efficiency VRM and VRD
8 Ld SOIC
M8.15
Tape and Reel
Related Literature
10 Ld 3x3 DFN L10.3x3
Technical Brief TB363 “Guidelines for Handling and
10 Ld 3x3 DFN
L10.3x3
Processing Moisture Sensitive Surface Mount Devices
Tape and Reel
(SMDs)”
Technical Brief TB389 “PCB Land Pattern Design and
Surface Mount Guidelines for QFN (MLFP) Packages”
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
All other trademarks mentioned are the property of their respective owners.
ISL6594D
FN9282.1
Conduction Offset Effect
DS(ON)
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2006, 2007. All Rights Reserved

ISL6594DCBZ Summary of contents

  • Page 1

    ... PART NUMBER PART TEMP. (Note) MARKING RANGE (°C) ISL6594DCBZ 6594 DCBZ 0 to +85 ISL6594DCBZ-T* 6594 DCBZ 0 to +85 ISL6594DCRZ 94DZ 0 to +85 ISL6594DCRZ-T* 94DZ 0 to +85 *Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach ...

  • Page 2

    Pinouts ISL6594DCB (8 LD SOIC) TOP VIEW UGATE 1 BOOT 2 PWM 3 GND 4 Block Diagram VCC +5V 13.6k PWM 6.4k 2 ISL6594D 8 PHASE 7 PVCC 6 VCC 5 LGATE ISL6594D UVCC Pre-POR OVP FEATURES SHOOT- THROUGH PROTECTION ...

  • Page 3

    Typical Application - 4 Channel Converter Using ISL6592 and ISL6594D Gate Drivers +12V +5V +3.3V VDD V12_SEN GND ISL6592 OUT1 VID4 OUT2 VID3 ISEN1 VID2 OUT3 OUT4 VID1 ISEN2 FROM µP VID0 OUT5 VID5 OUT6 LL0 ISEN3 LL1 OUTEN OUT7 ...

  • Page 4

    ... Maximum Junction Temperature (Plastic Package +150° 0.3V Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C DC BOOT + 0.3V Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below BOOT 0.3V http://www.intersil.com/pbfree/Pb-FreeReflow.asp DC PVCC + 0.3V PVCC to 15V DC DC Recommended Operating Conditions <36V)) BOOT-GND Ambient Temperature Range 0°C to +85°C Maximum Operating Junction Temperature +125° ...

  • Page 5

    Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. (Continued) PARAMETER LGATE Turn-On Propagation Delay (Note 4) UGATE Turn-Off Propagation Delay (Note 4) LGATE Turn-Off Propagation Delay (Note 4) LG/UG Three-State Propagation Delay (Note 4) OUTPUT (Note 4) Upper Drive Source ...

  • Page 6

    ... The PDHL Three-State PWM Input A unique feature of these drivers and other Intersil drivers is the addition of a shutdown window to the PWM input. If the PWM signal enters and remains within the shutdown window ], turning on the lower for a set hold-off time, the driver outputs are disabled and both MOSFET gates are pulled and held low ...

  • Page 7

    Specifications” on page 4 determine when the lower and upper gates are enabled. This feature helps prevent a negative transient on the output voltage when the output is shut down, eliminating the Schottky diode that ...

  • Page 8

    When designing the driver into an application recommended that the following calculations are used to ensure safe operation at the desired frequency for the selected MOSFETs. The total gate drive power losses due to the gate ...

  • Page 9

    This combination of vias for vertical heat escape, extended copper plane, and buried planes for heat spreading allows the IC to achieve its full thermal potential. Upper MOSFET Self Turn-On Effects at Start-up Should the driver have insufficient bias ...

  • Page 10

    ... The pin #1 identifier may be either a mold or mark feature. 7. Dimensions D2 and E2 are for the exposed pads which provide NX b improved electrical and thermal performance Nominal dimensions are provided to assist with PCB Land Pattern Design efforts, see Intersil Technical Brief TB389. 0. 0.200 ...

  • Page 11

    ... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...