MC33883DW Freescale Semiconductor, MC33883DW Datasheet

IC H-BRIDGE PRE-DRIVER 20-SOIC

MC33883DW

Manufacturer Part Number
MC33883DW
Description
IC H-BRIDGE PRE-DRIVER 20-SOIC
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC33883DW

Configuration
H Bridge
Input Type
Non-Inverting
Delay Time
200ns
Current - Peak
2A
Number Of Configurations
1
Number Of Outputs
4
Voltage - Supply
5.5 V ~ 55 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
High Side Voltage - Max (bootstrap)
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC33883DW
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
Part Number:
MC33883DWR2
Manufacturer:
FREESCALE
Quantity:
20 000
Freescale Semiconductor
Advance Information
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2007. All rights reserved.
H-Bridge Gate Driver IC
pre-driver) IC with integrated charge pump and independent high-
and low-side gate driver channels. The gate driver channels are
independently controlled by four separate input terminals, thus
allowing the device to be optionally configured as two independent
high-side gate drivers and two independent low-side gate drivers.
The low-side channels are referenced to ground. The high-side
channels are floating.
current pulses, permitting large gate-charge MOSFETs to be driven
and/or high Pulse Width Modulation (PWM) frequencies to be utilized.
A linear regulator is incorporated, providing a 15 V typical gate supply
to the low-side gate drivers.
Features
• V
• V
• CMOS / LSTTL Compatible I / O
• 1.0 A Peak Gate Driver Current
• Built-In High-Side Charge Pump
• Undervoltage Lockout (UVLO)
• Overvoltage Lockout (OVLO)
• Global Enable with <10 µA Sleep Mode
• Supports PWM up to 100 kHz
• Pb-Free Packaging Designated by Suffix Code EG
The 33883 is an H-bridge gate driver (also known as a full-bridge
The gate driver outputs can source and sink up to 1.0 A peak
CC
CC2
Operating Voltage Range from 5.5 V up to 55 V
Operating Voltage Range from 5.5 V up to 28 V
MCU
V BAT
Figure 1. 33883 Simplified Application Diagram
V BOOST
VCC
VCC2
G_EN
C1
C2
IN_HS1
IN_LS1
IN_HS2
IN_LS2
33883
GND_A
GATE_HS1
GATE_HS2
GATE_LS1
GATE_LS2
SRC_HS1
SRC_HS2
CP_OUT
LR_OUT
GND
/2
MCZ33883EG/R2
MC33883DW/R2
Device
H-BRIDGE GATE DRIVER IC
ORDERING INFORMATION
EG SUFFIX (PB-FREE)
20-TERMINAL SOICW
98ASB42343B
- 40°C to 125°C
Document Number: MC33883
Temperature
33883
DW SUFFIX
Range (T
Motor
DC
A
)
Rev 9.0, 1/2007
20 SOICW
Package

Related parts for MC33883DW

MC33883DW Summary of contents

Page 1

... V BAT MCU Figure 1. 33883 Simplified Application Diagram * This document contains certain information on a new product. Specifications and information herein are subject to change without notice. © Freescale Semiconductor, Inc., 2007. All rights reserved. Device MC33883DW/R2 MCZ33883EG/R2 V BOOST 33883 CP_OUT VCC VCC2 LR_OUT ...

Page 2

... CP_OUT +5.0 V LR_OUT LR_OUT CP_OUT Pulse Output GATE_HS Driver SRC_HS1 Thermal Shutdown LR_OUT OU IN Pulse Output GATE_LS1 Driver GND1 CP_OUT Pulse Output GATE_HS Driver SRC_HS2 Thermal Shutdown LR_OUT IN OU Output Pulse GATE_LS2 Driver GND2 Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 3

... IN_LS2 Input Low Side 2 17 IN_HS2 Input High Side 2 18 GATE_HS Gate 2 Output High Side 2 19 SRC_HS2 Source 2 Output High Side 20 G_EN Global Enable Analog Integrated Circuit Device Data Freescale Semiconductor TERMINAL CONNECTIONS 1 VCC 20 G_EN SRC_HS2 3 18 GATE_HS2 CP_OUT SRC_HS1 17 4 IN_HS2 ...

Page 4

... CP_OUT V GATE_HS V GATE_LS V G_EN Two Power CC2 V ESD1 V ESD2 = 100 pF, R ZAP = 0 Ω). = 200 pF, R ZAP ZAP Value - 250 - LR_OUT -0 ±1500 ±130 = 1500 Ω), ESD2 testing is performed in ZAP Analog Integrated Circuit Device Data Freescale Semiconductor Unit ...

Page 5

... Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow Temperature and Moisture Sensitivity Levels (MSL www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e. MC33xxxD enter 33xxx), and review parametrics. Analog Integrated Circuit Device Data Freescale Semiconductor Symbol θ ...

Page 6

... V 12.5 – 16 1.5 – – CC2 4.0 – – V 7.5 – – 7.0 – – 2.3 – – 1.8 – – 7.5 – – 7.0 – – A -2.0 – 2.0 V -1.5 – – Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 7

... The device may exhibit predictable behavior between 4.0 V and 5 See Figure 5, page 12, for a description of charge current. Analog Integrated Circuit Device Data Freescale Semiconductor = nF, G_EN = 4.5 V unless otherwise noted. Typical CC CC2 CP = 25°C under nominal conditions unless otherwise noted. ...

Page 8

... V, -40°C ≤ T ≤ 125°C, GND = 0.0 V unless otherwise noted. A SUP = 25°C under nominal conditions unless otherwise noted. A Symbol t PD (10) (see Figure Figure Figure 4) Min Typ Max Unit ns – 200 300 ns – 80 180 ns – 80 180 Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 9

... IN_HS or IN_LS GATE_HS or GATE_LS Analog Integrated Circuit Device Data Freescale Semiconductor TIMING DIAGRAMS 50 50 10% 90% Figure 4. Timing Characteristics TIMING DIAGRAMS 50 50 90% 10% 33883 9 ...

Page 10

... The LR_OUT terminal is the output of the internal regulator used to connect an external capacitor. GROUND TERMINALS (GND_A, GND1 AND GND2) These terminals are the ground terminals of the device. They should be connected together with a very low impedance connection. Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 11

... Overtemperature High-Side Gate Driver Overtemperature Low-Side Gate Driver x = Don’t care. Analog Integrated Circuit Device Data Freescale Semiconductor Table 5. Functional Truth Table Gate_HSn Gate_LSn Device is in Sleep mode. The gates are at low state Normal mode. The gates are controlled independently. ...

Page 12

... Note GATE_HS is loaded with a 100 nF capacitor in the chronograms. A smaller load will give lower peak and DC charge or discharge currents. Figure 6. High-Side Gate Driver Chronograms Figure 6. The output driver sources 1.0 A Peak 100 mA Typical 0 1.0 A Peak 0 1.0 A Peak 100 mA Typical 0 -1.0 A Peak Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 13

... Driver Requirement: Low Resistive Gate- Source Path During OFF-State Analog Integrated Circuit Device Data Freescale Semiconductor OPERATIONAL MODES TURN-OFF The peak current for turn-off can be obtained in the same way as for turn-on, with the exception that peak current for fall time, t ...

Page 14

... V . When CP_OUT provides peak current to the high-side CP_out CP_OUT Tosc2 Tosc2 Ccp Ccp_out CP_OUT Tosc1 Tosc1 V Vcc CC (3) HS GATE_HS MOSFET GATE_HS High-Side MOSFET Rg Rg SRC_HS SRC_HS LS Low-Side MOSFET MOSFET Figure 9. High-Side Gate Driver Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 15

... V CP value is. Moreover, for the same C value, when the CP switching frequency increases, the average V decreases. For most of the applications, a typical value recommended. Analog Integrated Circuit Device Data Freescale Semiconductor C CP_OUT Figure 11 depicts the simplified C contains two voltage waveforms. f value on V CP_OUT ...

Page 16

... V and CC2 CC can cause large peak currents CC Figure 13. min, is specified at 2.0 A for C1 max duration of C1 (Figure min is specified at -1.5 V for a C1 max = 600 ns. A series resistor with the charge C1 Analog Integrated Circuit Device Data Freescale Semiconductor 13). ...

Page 17

... OFF state. The addition of capacitors C3 and C4, as shown in Figure dV/dt of the source line, consequently reducing driver perturbation. Typical values for and are 10 Ω and 10 nF, respectively. Analog Integrated Circuit Device Data Freescale Semiconductor I max C1 t max C1 V ...

Page 18

... IN_LS2 Figure 14. Application Schematic with External Protection Circuit 33883 18 TYPICAL APPLICATIONS 33883 C CP_OUT CP_OUT 470 nF R1 LR_OUT C LR_OUT 50 Ω 470 nF GATE_HS1 SRC_HS1 10 Ω GATE_LS1 GATE_HS2 18 V SRC_HS2 GATE_LS2 GND 50 Ω Ω Ω Motor 50 Ω Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 19

... Important For the most current revision of the package, visit drawing number below. Analog Integrated Circuit Device Data Freescale Semiconductor PACKAGING PACKAGING DIMENSIONS www.freescale.com and do a keyword search on the 98A DW SUFFIX EG SUFFIX (PB-FREE) 20-TERMINAL SOICW PLASTIC PACKAGE 98ASB42343B ISSUE J PACKAGING PACKAGING DIMENSIONS ...

Page 20

... Added MCZ33883EG/R2 to the Ordering Information • Updated the package drawing to Rev. J • Removed Peak Package Reflow Temperature During Reflow (solder reflow) parameter from MAXIMUM RATINGS on page 33883 20 REVISION HISTORY 4. Added note with instructions from www.freescale.com. Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 21

... Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer ...

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