MCZ33927EK Freescale Semiconductor, MCZ33927EK Datasheet
MCZ33927EK
Specifications of MCZ33927EK
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MCZ33927EK Summary of contents
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... MCU OR DSP Figure 1. 33927 Simplified Application Diagram * This document contains certain information on a new product. Specifications and information herein are subject to change without notice. © Freescale Semiconductor, Inc., 2007. All rights reserved. Device MCZ33927EK/R2 33927 VPUMP VBAT PUMP PA_HS_G VPWR PB_HS_G ...
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... VBAT + 1.4V DESAT. - COMP CONTROL LOGIC + - + - PHASE VBAT COMP I-SENSE AMP. AMP_N AMP_P VLS_CAP VBAT TRICKLE HOLD CHARGE -OFF PUMP CIRCUIT VLS VDD PX_BOOT HIGH- PX_HS_G SIDE DRIVER PX_HS_S LOW- PX_LS_G SIDE DRIVER PGNDX Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... Digital Input 6, 33, 49, N/C – 50, 52 PUMP Power Drive Out 8 VPUMP Power Input 9 VBAT Digital Input 10 PHASEB Digital Output 11 PHASEC Digital Output Analog Integrated Circuit Device Data Freescale Semiconductor PIN CONNECTIONS 1 54 PGND 2 53 EN1 3 52 EN2 4 51 RST PUMP 7 48 ...
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... Gate Drive for output Phase B High-Side Phase B High-Side Gate Drive Bootstrap capacitor for Phase B Phase B Bootstrap Gate current return for the Low-Side FETs for Phase A Phase A Return Gate Drive for output Phase A Low-Side Drive section beginning on page 20. Definition Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... VLS Analog Output 54 VPWR Power Input EP Ground Analog Integrated Circuit Device Data Freescale Semiconductor Functional Pin Description Formal Name Source connection for Phase A High-Side FET Phase A High-Side Source Gate Drive for output Phase A High-Side Phase A High-Side Gate Drive Bootstrap capacitor for Phase A Phase A Bootstrap VLS regulator output ...
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... IN_A -7.0 to 10.0 V -0 BOOT V 75 HS_G V 16 LS_G V -7.0 HS_G V -7.0 HS_S V -7.0 LS_G V -7.0 PGND I -0.1 to 0.1 GATE V ESD ±2000 ±1000 ±750 = 100pF 1500Ω) and the Charge Device ZAP Analog Integrated Circuit Device Data Freescale Semiconductor Unit ...
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... Temperature and Moisture Sensitivity Levels (MSL www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e. MC33xxxD enter 33xxx), and review parametrics. Analog Integrated Circuit Device Data Freescale Semiconductor ELECTRICAL CHARACTERISTICS MAXIMUM RATINGS Symbol ...
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... BAT to > 8.0V. Once V exceeds 8.0V, the circuits PWR Analog Integrated Circuit Device Data Freescale Semiconductor Unit µ ...
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... It is not intended for external components to be connected to the High-Side FET gate, but small amounts of additional leakage can be accommodated. Analog Integrated Circuit Device Data Freescale Semiconductor STATIC ELECTRICAL CHARACTERISTICS ≤ 40V, -40°C ≤ T ≤ 125°C, unless otherwise noted. Typical ...
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... V – – – 0.5 – 50 – kΩ 1.2 1.4 1.6 – 1.0 – kΩ 5.0 – 15 kΩ -800 – +800 mV 0 – 3.0 -15 – +15 mV – -10 – µV/°C -200 – +200 nA Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... This parameter is a design characteristic, not production tested. 25. Without considering any offsets such as input offset voltage, internal mismatch and assuming no tolerance error in external resistors. Analog Integrated Circuit Device Data Freescale Semiconductor ≤ 40V, -40°C ≤ PWR BAT = 25°C under nominal conditions unless otherwise noted. ...
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... V – 2.1 – – 250 450 mV – 18 µA – 25 µA 15 – pF – 2 kΩ 4.0 4.5 V – – – 0 µA – 1.0 15 – pF – VDD DD DD – 0.5 V 170 185 ° °C Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... This is the maximum separation or overlap of the High and Low side gate drives due to propagation delays when commanding one ON and the other OFF simultaneously. 37. The output of the overtemperature comparator goes through a digital filter before generating a warning or interrupt. Analog Integrated Circuit Device Data Freescale Semiconductor ≤ 40V, -40°C ≤ PWR BAT = 25° ...
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... Unlimited 10.2 15 19.6 0.9 – 3.5 10 – 240 10 – 200 – – 200 – – 350 – – 100 4.0 – 8.1 560 1000 1230 – 1.0 2.0 Analog Integrated Circuit Device Data Freescale Semiconductor Unit % s µs µ µs ns µs ...
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... This parameter is guaranteed by design, not production tested. 43. Rise and fall times are measured from the transition of a step function on the input to 90% of the change in output voltage. Analog Integrated Circuit Device Data Freescale Semiconductor ≤ 40V, -40°C ≤ PWR BAT = 25°C under nominal conditions unless otherwise noted. ...
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... Min Typ Max – 5 – 5 100 – – 100 – – 25 – – 25 – – – 5.0 – – 5.0 – – 55 100 – 100 125 – 55 100 200 – – Analog Integrated Circuit Device Data Freescale Semiconductor Unit MHz MHz % ...
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... Figure 5. Desaturation Blanking and Filtering Detail STATE P _HS X MACHINE D Q CLK DEADTIME CONTROL P _LS PULSE CLK EN1 EN2 RST Analog Integrated Circuit Device Data Freescale Semiconductor TIMING DIAGRAMS DI(S U) DI(HO LD) SISU SIHOLD MSB MSB out Figure 4. SPI Interface Timing B MUX OUT D CLK CLK ...
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... Px_LS_G Figure 7. Driver Turn-On Time and Turn-On Delay 50% Px_HS Px_HS_G Px_ LS Px_LS_G Figure 8. Driver Turn-Off Time and Turn-Off Delay 33927 18 50% 10V t D_ONH t ONH 10V t D_ONL t ONL 1.0V 10V t D_OFFH t OFFH 50 D_OFFL t OFFL 1.0V Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... To P rotection Circuits Figure 9. Current Amplifier and Input Waveform (V Analog Integrated Circuit Device Data Freescale Semiconductor AMP_P + AMP_N R s OC_TH AMP_O UT R FBN Voltage Across R IN ELECTRICAL CHARACTERISTICS TIMING DIAGRAMS + sens SENSE 33927 19 ...
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... This input logic signal pin enables the Low-Side Driver for Phase A. The signal is active high, and is pulled down by an internal current sink. VDD VOLTAGE REGULATOR (VDD) This pin is an internally generated 5V supply. The internal regulator provides continuous power to the IC and is a supply Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... CS is low. New data appears on rising edges of SCLK in preparation for latching by the falling edge of SCLK on the master. Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DESCRIPTIONS PHASE C LOW-SIDE INPUT (PC_LS) This input logic pin enables the Low-Side Driver for Phase C ...
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... This is the bootstrap capacitor connection for phase A. A capacitor (typically 0.1µF) connected between PA_HS_S and this pin provides the gate voltage and current to drive the external FET gate. The voltage across this capacitor is limited to about 15V. Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... VPWR is the power supply input for VLS and VDD. Current flowing into this input recharges the bootstrap capacitors as Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DESCRIPTIONS well as supplying power to the low-side gate drivers and the VDD regulator. An internal regulator regulates the actual gate voltages ...
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... The power for the gate drive circuits is provided through the VPWR pin. This pin can be connected to VBAT and is capable of withstanding up to the full load dump voltage of the system. However, the IC only requires a low-voltage supply Figure 6 and De adt ime De lay Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... Caution must be exercised after a long period of inactivity of the low-side switches, to verify the bootstrap capacitor is not discharged. Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL INTERNAL BLOCK DESCRIPTION It can be recharged by activating the low-side switches for a brief period attaching external bleed resistors to the HS_S pins to GND ...
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... INT flag and disable output stage shutdown, due to desaturation and phase errors. See the Commands and Registers behavior and disabling the protective function. is less than 1.4V below V X-HS_S BAT ) a desaturation fault is BLANK Logic section for details on masking INT Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... Px_HS_S is still high at the end of the deadtime and blanking time duration. Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL INTERNAL BLOCK DESCRIPTION The Phase Error Flag is the triple OR of phase errors from each phase. Each phase error is the OR of the high side and low side phase errors ...
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... Px_HS_S to GND, then a very brief pulse of 1.0 µs is sufficient to reset the logic 5.0V to 45V 0.47µF) BAT PWR Characteristic (49) (49) , Charge Pump and Value Low (<1.0V) High (>2.0V) Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... Thus, when an interrupt occurs, the host can query the IC by sending a NULL command; the return word contains flags Analog Integrated Circuit Device Data Freescale Semiconductor LOGIC COMMANDS AND REGISTERS word can be considered to be the Command with the trailing five bits being the data. ...
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... From Clint Command Table 10. MASK1 Register SPI Data Bits 7 6 Write 0 0 Reset 33927 Figure illustrates how interrupts are enabled and faults Status Register From MASKx:N Register Fault S Latch R Figure 15. Interrupt Handling net N INT net Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... Disable: Desaturation /Phase Error channel shutdown is disabled, but interrupts are still possible if unmasked. Sending a MODE command and setting the Mode Lock simultaneously are allowed. This sets the requested mode and locks out any further changes. Analog Integrated Circuit Device Data Freescale Semiconductor Description 5 4 ...
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... If there are any transitions SCLK while the Deadtime CS pulse is low, a Framing Error will be generated, however, the CS pulse will be used to calibrate the deadtime Deadtime Calibration Pulse DEADTIME Command Figure 16. Deadtime Calibration ZERO/ CALIBRATE Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... Bit 7 –is set upon exiting RST . It can be used to test the interrupt mechanism or to flag for a condition where the IC gets reset without the host being otherwise aware. This flag can generate an interrupt if the appropriate mask bit is set. Analog Integrated Circuit Device Data Freescale Semiconductor Other commands return a general status word in the Status Register 0. ...
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... Zero Calibration Deadtime Deadtime Overflow Calibration Set Mask1:1 Mask1:0 Mask0 Dead5 Dead4 Dead3 FULLON Lock Mode Bit Mask0:2 Mask0:1 Mask0 Dead2 Dead1 Dead0 Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... Send CLINT1 command to clear processed faults 4:7. Note, the return SR0 register from this command is actually read in the main routine. 5. Re-enable interrupts from the 33927 6. Return Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DEVICE OPERATION LOGIC COMMANDS AND REGISTERS 33927 35 ...
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... All external FETs turned off voltage across R • Fault bit set in Status Register SENSE • Low-Side Phase Error • INT pin set high • Directly sensed by ADC as voltage across R SENSE Analog Integrated Circuit Device Data 33927 Protective Action Freescale Semiconductor ...
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... OC_OUT - GND(2) OVER-CUR. I-SENSE COMP. AMP. AMP_OUT VSS OC_TH To ADC Figure 17. Typical Application Diagram Using Charge Pump (+12V Battery System) Analog Integrated Circuit Device Data Freescale Semiconductor TYPICAL APPLICATIONS VPWR VBAT TRICKLE HOLD CHARGE -OFF PUMP CIRCUIT VLS 5V REG. REG. VDD ...
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... DESAT. DRIVER - COMP LOGIC + - + - PHASE VBAT COMP. LOW- SIDE DRIVER + - AMP_N AMP_P VLS_CAP + To Other Two Phases VLS VDD PX_BOOT C x_Boot R g_HS PX_HS_G (Optional) Phase x Output PX_HS_S To Motor R g_LS PX_LS_G (Optional) Phase Return PGNDX R Sense Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... Below approximately 17V the charge pump is actively regulating Vpwr. The increased power dissipation is due to the charge pump losses. Above this voltage the charge pump oscillator shuts down and Vbat is passed through the pump diodes directly to Vpwr. Analog Integrated Circuit Device Data Freescale Semiconductor TYPICAL APPLICATIONS PROTECTION AND DIAGNOSIS FEATURES 33927 ...
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... Switching Single Phase • No connections to PUMP or VPUMP • VPWR connected to Vbat If VPWR is supplied by a separate pre-regulator, the power dissipation profile will be nearly flat at the value of the pre-regulator voltage for all Vbat voltages. 33927 40 Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... For the most current package revision, visit www.freescale.com and perform a keyword search using the “98A” listed below. Analog Integrated Circuit Device Data Freescale Semiconductor PACKAGING PACKAGING DIMENSION EK SUFFIX (PB-FREE) 54-PIN 98ASA99334D ISSUE C PACKAGING PACKAGING DIMENSION 33927 41 ...
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... PACKAGING PACKAGING DIMENSION (CONTINUED) 33927 42 PACKAGING DIMENSION (CONTINUED) EK SUFFIX (PB-FREE) 54-PIN 98ASA99334D ISSUE C Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... REVISION DATE DESCRIPTION OF CHANGES 8/2007 • Initial Release 2.0 Analog Integrated Circuit Device Data Freescale Semiconductor REVISION HISTORY REVISION HISTORY 33927 43 ...
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... Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer ...