L6226PDTR STMicroelectronics, L6226PDTR Datasheet - Page 13

IC DRVR DUAL FULL BRDG 36PWRSOIC

L6226PDTR

Manufacturer Part Number
L6226PDTR
Description
IC DRVR DUAL FULL BRDG 36PWRSOIC
Manufacturer
STMicroelectronics
Type
H Bridger
Datasheet

Specifications of L6226PDTR

Input Type
Non-Inverting
Number Of Outputs
4
On-state Resistance
730 mOhm
Current - Output / Channel
1.4A
Current - Peak Output
2.8A
Voltage - Supply
8 V ~ 52 V
Operating Temperature
-25°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
36-PowerSOIC
Operating Supply Voltage
8 V to 52 V
Supply Current
10 mA
Mounting Style
SMD/SMT
For Use With
497-6816 - EVAL BOARD FOR L6226Q
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-5347-2
L6226PDTR

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Part Number:
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L6226
4.3
Non-dissipative overcurrent detection and protection
An overcurrent detection circuit (OCD) is integrated. This circuit can be used to provides
protection against a short circuit to ground or between two phases of the bridge as well as a
roughly regulation of the load current. With this internal over current detection, the external
current sense resistor normally used and its associated power dissipation are eliminated.
Figure 9
Bridge B is provided of an analogous circuit.
To implement the over current detection, a sensing element that delivers a small but precise
fraction of the out-put current is implemented with each high side power MOS. Since this
current is a small fraction of the output current there is very little additional power
dissipation. This current is compared with an internal reference cur-rent IREF. When the
output current reaches the detection threshold Isover the OCD comparator signals a fault
condition. When a fault condition is detected, an internal open drain MOS with a pull down
capability of 4 mA connected to OCD pin is turned on.
This signal can be used to regulate the output current simply by connecting the OCD pin to
EN pin and adding an external R-C as shown in
normal operation can be easily programmed by means of the accurate thresholds of the
logic inputs.
I
following the equations:
Figure 11
to 40 kΩ.
The disable time t
means of the accurate
thresholds of the logic inputs. It is affected whether by C
magnitude is reported in
an overcurrent has been detected depends only by C
Figure
C
the value of C
delay time and the R
The resistor R
values for R
disable time.
REF
EN
is also used for providing immunity to pin EN against fast transient noises. Therefore
and, therefore, the output current detection threshold are selectable by RCL value,
Isover = 2.8A ±30% at -25°C < Tj < 125 °C if R
Isover = 11050 / R
13.
shows a simplified schematic of the overcurrent detection circuit for the Bridge A.
shows the output current protection threshold versus R
EN
EN
EN
and C
should be chosen as big as possible according to the maximum tolerable
should be chosen in the range from 2.2 kΩ to 180 kΩ. Recommended
DISABLE
EN
EN
CL
value should be chosen according to the desired disable time.
are respectively 100 kΩ and 5.6 nF that allow obtaining 200 µs
Figure
before recovering normal operation can be easily programmed by
±10% at -25 °C < T
Doc ID 9452 Rev 4
12. The delay time t
j
< 125 °C if 5 kΩ < R
Figure
DELAY
CL
EN
Figure 10
= 0 Ω (PROGCL connected to GND)
9. The off time before recovering
EN
value. Its magnitude is reported in
before turning off the bridge when
and R
shows the OCD operation.
CL
EN
C
value in the range 5 kΩ
values and its
< 40 kΩ
Circuit description
13/31

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