IC DRIVER FULL BRG DUAL 32VFQFPN

L6226Q

Manufacturer Part NumberL6226Q
DescriptionIC DRIVER FULL BRG DUAL 32VFQFPN
ManufacturerSTMicroelectronics
TypeH Bridge
L6226Q datasheet
 


Specifications of L6226Q

Input TypeNon-InvertingNumber Of Outputs4
On-state Resistance730 mOhmCurrent - Output / Channel1.4A
Current - Peak Output2.8AVoltage - Supply8 V ~ 52 V
Operating Temperature-25°C ~ 125°CMounting TypeSurface Mount
Package / Case32-VFQFN, 32-VFQFPNProductH-Bridge Drivers
Rise Time250 nsFall Time250 ns
Supply Voltage (min)8 VMaximum Operating Temperature+ 150 C
Mounting StyleSMD/SMTBridge TypeFull Bridge
Maximum Turn-on Delay Time1900 nsMinimum Operating Temperature- 40 C
Number Of Drivers2For Use With497-6816 - EVAL BOARD FOR L6226Q
Lead Free Status / RoHS StatusLead free / RoHS Compliant  
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Features
Operating supply voltage from 8 to 52 V
2.8 A output peak current (1.4 A DC)
0.73 Ω typ. value @
R
DS(on)
Operating frequency up to 100 kHz
Programmable high side overcurrent detection
and protection
Diagnostic output
Paralleled operation
Cross conduction protection
Thermal shutdown
Under voltage lockout
Integrated fast free wheeling diodes
Applications
Bipolar stepper motor
Dual or quad DC motor
Figure 1.
Block diagram
VBOOT
V
BOOT
CHARGE
VCP
PUMP
PROGCL
A
OCD
A
THERMAL
PROTECTION
EN
A
IN1
A
IN2
A
VOLTAGE
REGULATOR
OCD
B
PROGCL
B
EN
B
IN1
B
IN2
B
August 2010
DMOS dual full bridge driver
= 25 °C
T
J
Description
The L6226Q is a DMOS dual full bridge designed
for motor control applications, realized in
BCDmultipower technology, which combines
isolated DMOS power transistors with CMOS and
bipolar circuits on the same chip. Available in
QFN32 5x5 package, the L6226Q features
thermal shutdown and a non-dissipative
overcurrent detection on the high side power
MOSFETs plus a diagnostic output that can be
easily used to implement the overcurrent
protection.
V
BOOT
OVER
OCD
CURRENT
A
DETECTION
10V
GATE
LOGIC
10V
5V
OVER
OCD
CURRENT
B
DETECTION
GATE
LOGIC
Doc ID 14335 Rev 5
L6226Q
VS
A
V
BOOT
OUT1
A
OUT2
A
10V
SENSE
A
BRIDGE A
V S
B
OUT1
B
OUT2
B
SENSE
B
BRIDGE B
D99IN1088A
1/29
www.st.com
29

L6226Q Summary of contents

  • Page 1

    ... DMOS dual full bridge driver = 25 ° Description The L6226Q is a DMOS dual full bridge designed for motor control applications, realized in BCDmultipower technology, which combines isolated DMOS power transistors with CMOS and bipolar circuits on the same chip. Available in QFN32 5x5 package, the L6226Q features ...

  • Page 2

    ... Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.4 Non-dissipative overcurrent detection and protection . . . . . . . . . . . . . . . 12 4.5 Thermal protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 6 Paralleled operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 7 Output current capability and IC power dissipation . . . . . . . . . . . . . . 23 8 Thermal management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 9 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 10 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 2/29 Doc ID 14335 Rev 5 L6226Q ...

  • Page 3

    ... L6226Q 1 Electrical data 1.1 Absolute maximum ratings Table 1. Absolute maximum ratings Symbol Parameter V Supply voltage S Differential voltage between OUT1 , OUT2 OUT1 , OUT2 B B OCD ,OCD OCD pins voltage range A B PROGCL , A PROGCL pins voltage range PROGCL B V Bootstrap peak voltage BOOT ...

  • Page 4

    ... Thermal data Table 3. Thermal data Symbol R Thermal resistance junction-ambient max. th(JA) 1. Mounted on a double-layer FR4 PCB with a dissipating copper surface of 0 ground layer connected through 18 via holes (9 below the IC). 4/29 Parameter (1) Doc ID 14335 Rev 5 L6226Q Value Unit °C the top side plus 6 ...

  • Page 5

    ... L6226Q 2 Pin connection Figure 2. Pin connection (top view) Note: 1 The pins are connected to die PAD. 2 The die PAD must be connected to GND pin. Doc ID 14335 Rev 5 Pin connection 5/29 ...

  • Page 6

    ... Bridge A source pin. This pin must be connected to power ground directly or through a sensing power resistor. Bridge A overcurrent detection and thermal protection pin. An internal open drain transistor pulls to GND when overcurrent on bridge A is detected or in case of thermal protection. Doc ID 14335 Rev 5 Function L6226Q ...

  • Page 7

    ... L6226Q 3 Electrical characteristics ° unless otherwise specified A Table 5. Electrical characteristics Symbol Parameter V Turn-on threshold Sth(ON) V Turn-off threshold Sth(OFF) I Quiescent supply current S T Thermal shutdown temperature J(OFF) Output DMOS transistors High-side + low-side switch ON R DS(on) resistance I Leakage current DSS Source drain diodes ...

  • Page 8

    ... T < 125 °C J <125 °C;RCL=39 kΩ -25 °C<T J <125 °C;RCL= 5 kΩ -25 °C<T J <125 °C;RCL= GND -25 °C< ( mA; C < 100 mA; C < 100 pF EN Doc ID 14335 Rev 5 L6226Q Min Typ Max Unit 0.5 1 µs 0.6 1 MHz -10% 0.29 +10% A -10% 2.21 +10% A -30% 2.8 +30% A Ω ...

  • Page 9

    ... L6226Q Figure 4. Overcurrent detection timing definition Doc ID 14335 Rev 5 Electrical characteristics 9/29 ...

  • Page 10

    ... Circuit description 4.1 Power stages and charge pump The L6226Q integrates two independent power MOS full bridges. Each power MOS has an = 0.73 Ω (typical value @ 25 °C), with intrinsic fast freewheeling diode. Cross R DS(on) conduction protection is achieved using a dead time ( μs typical) between the switch off and switch on of two power MOS in one leg of a bridge ...

  • Page 11

    ... L6226Q 4.2 Logic inputs Pins IN1 , IN2 , IN1 A A logic inputs. The internal structure is shown in thresholds are respectively Vthon = 1.8 V and Vthoff = 1.3 V. Pins EN and EN A connecting them respectively to the outputs OCD outputs. If that type of connection is chosen, some care needs to be taken in driving these pins ...

  • Page 12

    ... DISABLE Doc ID 14335 Rev 5 Outputs OUT1 (2) High Z GND Vs GND Vs . When the REF Figure 10 shows the OCD operation. Figure 9. The off time before recovering Ω CL < 40 kΩ CL value in the range 5 kΩ CL L6226Q OUT2 High Z GND GND Vs Vs value, and ...

  • Page 13

    ... L6226Q values and its magnitude is reported in the bridge when an overcurrent has been detected depends only by C magnitude is reported also used for providing immunity to pin EN against fast transient noises. Therefore EN the value Delay Time and the R The resistor R EN values for R and C EN disable time ...

  • Page 14

    ... Circuit description Figure 10. Overcurrent protection waveforms I OUT I SOVER th(ON) V th(OFF) ON OCD OFF ON BRIDGE OFF t OCD(ON) Figure 11. Output current protection threshold versus 14/29 t DELAY t t EN(FALL) OCD(OFF) t D(OFF) Doc ID 14335 Rev 5 V EN(LOW) t DISABLE t t EN(RISE) D(ON)EN D02IN1400 value Ω L6226Q ...

  • Page 15

    ... L6226Q Figure 12. t DISABLE 100 100 10 10 Figure 13. t DELAY versus C and 220 k Ω = 220 k Ω [nF] [nF versus 0.1 1 Cen [nF] Doc ID 14335 Rev 5 Circuit description = 100 k Ω = 100 k Ω Ω Ω Ω Ω Ω Ω 100 100 10 100 15/29 ...

  • Page 16

    ... Circuit description 4.5 Thermal protection In addition to the overcurrent detection, the L6226Q integrates a thermal protection for preventing the device destruction in case of junction over temperature. It works sensing the die temperature by means of a sensible element integrated in the die. The device switch-off when the junction temperature reaches 165 °C (typ. value) with 15 °C hysteresis (typ. ...

  • Page 17

    ... L6226Q 5 Application information A typical application using L6226Q is shown in application are shown in nF should be placed between the power pins (VS to improve the high frequency filtering on the power supply and reduce high frequency transients generated by the switching. The capacitors connected from the EN EN ...

  • Page 18

    ... Application information Figure 14. Typical application Note: To reduce the IC thermal resistance, therefore improve the dissipation path, the NC pins can be connected to GND. 18/29 Doc ID 14335 Rev 5 L6226Q ...

  • Page 19

    ... L6226Q 6 Paralleled operation The outputs of the L6226Q can be paralleled to increase the output current capability or reduce the power dissipation in the device at a given current level. It must be noted, however, that the internal wire bond connections from the die to the power or sense pins of the package must carry current in both of the associated half bridges. When the two halves ...

  • Page 20

    ... A max OCD threshold 20/29 Figure 16. In this configuration, the peak current for each half bridge is sets the threshold when outputs OUT1 CLA = R . CLA CLB = 25 °C J Doc ID 14335 Rev 5 and OUT2 are high and A A and OUT2 are high L6226Q or CLA ...

  • Page 21

    ... L6226Q Figure 16. Parallel connection with lower overcurrent threshold It is also possible to parallel the four half bridges to obtain a simple half bridge as shown in Figure 17. In this configuration the, the over current threshold is equal to twice the minimum threshold set by the resistors CLA CLB The resulting half bridge has the following characteristics. ...

  • Page 22

    ... Paralleled operation Figure 17. Paralleling the four half bridges 22/29 Doc ID 14335 Rev 5 L6226Q ...

  • Page 23

    ... L6226Q 7 Output current capability and IC power dissipation In Figure 18 and and the IC power dissipation using PWM current control driving two loads, for two different driving types: ● One full bridge time ● Two full bridges ON at the same time are energized. For a given output current and driving type the power dissipated by the IC can be easily ...

  • Page 24

    ... PCB with proper area and thickness. For instance, using a VFQFPN32L 5x5 package the typical R a dissipating copper surface of 0.5 cm through 18 via holes (9 below the IC). 24/29 is about 42 °C/W when mounted on a double-layer FR4 PCB with th(JA the top side plus 6 cm Doc ID 14335 Rev 5 L6226Q 2 ground layer connected ...

  • Page 25

    ... L6226Q 9 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® trademark. Table 9. VFQFPN32 5x5x1.0 pitch 0.50 Dim. ...

  • Page 26

    ... Package mechanical data Figure 20. Package dimensions 26/29 Doc ID 14335 Rev 5 L6226Q ...

  • Page 27

    ... L6226Q 10 Order codes Table 10. Order code Order code L6226Q L6226QTR Package VFQFPN32 5x5x1.0 Doc ID 14335 Rev 5 Order codes Packaging Tube Tape and reel 27/29 ...

  • Page 28

    ... Figure 14 on page page 21 and Figure 17 on page 22 2 Added: Note 1 on page 4 3 Updated value in Table 3: Thermal data on page 4 4 Updated value in Table 1: Absolute maximum ratings on page 3 5 Updated Table 10 Doc ID 14335 Rev 5 L6226Q Changes 18, Figure 15 on page 20, Figure 16 on ...

  • Page 29

    ... L6226Q Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...