L6226Q STMicroelectronics, L6226Q Datasheet - Page 19

IC DRIVER FULL BRG DUAL 32VFQFPN

L6226Q

Manufacturer Part Number
L6226Q
Description
IC DRIVER FULL BRG DUAL 32VFQFPN
Manufacturer
STMicroelectronics
Type
H Bridger
Datasheet

Specifications of L6226Q

Input Type
Non-Inverting
Number Of Outputs
4
On-state Resistance
730 mOhm
Current - Output / Channel
1.4A
Current - Peak Output
2.8A
Voltage - Supply
8 V ~ 52 V
Operating Temperature
-25°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
32-VFQFN, 32-VFQFPN
Product
H-Bridge Drivers
Rise Time
250 ns
Fall Time
250 ns
Supply Voltage (min)
8 V
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Bridge Type
Full Bridge
Maximum Turn-on Delay Time
1900 ns
Minimum Operating Temperature
- 40 C
Number Of Drivers
2
For Use With
497-6816 - EVAL BOARD FOR L6226Q
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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L6226Q
6
Paralleled operation
The outputs of the L6226Q can be paralleled to increase the output current capability or
reduce the power dissipation in the device at a given current level. It must be noted,
however, that the internal wire bond connections from the die to the power or sense pins of
the package must carry current in both of the associated half bridges. When the two halves
of one full bridge (for example OUT1
current rating is not increased since the total current must still flow through one bond wire on
the power supply or sense pin. In addition the over current detection senses the sum of the
current in the upper devices of each bridge (A or B) so connecting the two halves of one
bridge in parallel does not increase the over current detection threshold.
For most applications the recommended configuration is half bridge 1 of bridge A paralleled
with the half bridge 1 of the bridge B, and the same for the half bridges 2 as shown in
Figure
R
When connected in this configuration the over current detection circuit, which senses the
current in each bridge (A and B), will sense the current in upper devices connected in
parallel independently and the sense circuit with the lowest threshold will trip first. With the
enables connected in parallel, the first detection of an over current in either upper DMOS
device will turn of both bridges. Assuming that the two DMOS devices share the current
equally, the resulting over current detection threshold will be twice the minimum threshold
set by the resistors R
In this configuration the resulting bridge has the following characteristics.
DS(on)
Equivalent device: full bridge
R
2.8 A max RMS load current
5.6 A max OCD threshold
DS(on)
15. The current in the two devices connected in parallel will share very well since the
of the devices on the same die is well matched.
0.37 Ω typ. value @ T
CLA
or R
CLB
Doc ID 14335 Rev 5
in
J
Figure
= 25 °C
A
and OUT2
15. It is recommended to use R
A
) are connected in parallel, the peak
Paralleled operation
CLA
= R
CLB
.
19/29

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