L6225D STMicroelectronics, L6225D Datasheet - Page 12

• Manufacturer Part Number: L6225D
• Description: IC DRVR FULL BRIDGE DUAL 20-SOIC
• Manufacturer: STMicroelectronics
• Type: H Bridger

Specifications of L6225D

• Input Type: Non-Inverting
• Number Of Outputs: 4
• On-state Resistance: 730 mOhm
• Current - Output / Channel: 1.4A
• Current - Peak Output: 2.8A
• Voltage - Supply: 8 V ~ 52 V
• Operating Temperature: -25°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)
• Operating Supply Voltage: 8 V to 52 V
• Supply Current: 10 mA
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-1430-5

L6225
APPLICATION INFORMATION
A typical application using L6225 is shown in Fig. 11. Typical component values for the application are shown
in Table 2. A high quality ceramic capacitor in the range of 100 to 200 nF should be placed between the power
pins (VS
reduce high frequency transients generated by the switching. The capacitors connected from the EN
inputs to ground set the shut down time for the Brgidge A and Bridge B respectively when an over current is
detected (see Overcurrent Protection). The two current sources (SENSE
to Power Ground with a trace length as short as possible in the layout. To increase noise immunity, unused logic
pins (except EN
description). It is recommended to keep Power Ground and Signal Ground separated on PCB.
Table 2. Component Values for Typical Application
Figure 11. Typical Application
12/20
C
C
C
C
C
C
1
2
BOOT
P
ENA
ENB
8-52V
VS
A
+
GROUND
-
DC
POWER
and VS
GROUND
SIGNAL
C
A
1
B
and EN
) and ground near the L6225 to improve the high frequency filtering on the power supply and
B
) are best connected to 5V (High Logic Level) or GND (Low Logic Level) (see pin
C
2
C
BOOT
100uF
100nF
220nF
5.6nF
5.6nF
D
10nF
LOAD
LOAD
1
D
A
B
2
R
P
SENSE
SENSE
VBOOT
C
OUT1
OUT2
OUT1
OUT2
P
VCP
VS
VS
A
B
A
B
A
A
B
B
17
14
19
12
3
8
4
18
7
13
D
D
R
R
R
1
2
ENA
ENB
P
A
and SENSE
D02IN1345
20
11
10
16
15
9
1
2
6
5
EN
EN
IN1
IN2
IN1
IN2
GND
GND
GND
GND
A
B
B
B
A
A
B
) should be connected
R
C
R
C
ENA
ENA
ENB
ENB
1N4148
1N4148
100K
100K
100
ENABLE
ENABLE
IN1
IN2
IN1
IN2
A
and EN
B
B
A
A
A
B
B