L6225D STMicroelectronics, L6225D Datasheet - Page 9

IC DRVR FULL BRIDGE DUAL 20-SOIC

L6225D

Manufacturer Part Number
L6225D
Description
IC DRVR FULL BRIDGE DUAL 20-SOIC
Manufacturer
STMicroelectronics
Type
H Bridger
Datasheet

Specifications of L6225D

Input Type
Non-Inverting
Number Of Outputs
4
On-state Resistance
730 mOhm
Current - Output / Channel
1.4A
Current - Peak Output
2.8A
Voltage - Supply
8 V ~ 52 V
Operating Temperature
-25°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Operating Supply Voltage
8 V to 52 V
Supply Current
10 mA
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-1430-5

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NON-DISSIPATIVE OVERCURRENT PROTECTION
The L6225 integrates an Overcurrent Detection Circuit (OCD). This circuit provides protection against a short
circuit to ground or between two phases of the bridge. With this internal over current detection, the external cur-
rent sense resistor normally used and its associated power dissipation are eliminated. Figure 7 shows a simpli-
fied schematic of the overcurrent detection circuit.
To implement the over current detection, a sensing element that delivers a small but precise fraction of the out-
put current is implemented with each high side power MOS. Since this current is a small fraction of the output
current there is very little additional power dissipation. This current is compared with an internal reference cur-
rent I
OCD comparator signals a fault condition. When a fault condition is detected, the EN pin is pulled below the turn
off threshold (1.3V typical) by an internal open drain MOS with a pull down capability of 4mA. By using an ex-
ternal R-C on the EN pin, the off time before recovering normal operation can be easily programmed by means
of the accurate thresholds of the logic inputs.
Figure 7. Overcurrent Protection Simplified Schematic
Figure 8 shows the Overcurrent Detection operation. The Disable Time t
tion can be easily programmed by means of the accurate thresholds of the logic inputs. It is affected whether by
C
when an overcurrent has been detected depends only by C
C
should be chosen as big as possible according to the maximum tolerable Delay Time and the R
be chosen according to the desired Disable Time.
The resistor R
are respectively 100K
EN
EN
and R
is also used for providing immunity to pin EN against fast transient noises. Therefore the value of C
REF
. When the output current in one bridge reaches the detection threshold (typically 2.8A) the relative
EN
values and its magnitude is reported in Figure 9. The Delay Time t
EN
C or LOGIC
+5V
should be chosen in the range from 2.2K to 180K . Recommended values for R
R
C
EN
EN
and 5.6nF that allow obtaining 200 s Disable Time.
EN
A
40 TYP.
R
DS(ON)
TO GATE
LOGIC
OPEN-DRAIN
INTERNAL
POWER SENSE
COMPARATOR
1 cell
OCD
POWER DMOS
OVER TEMPERATURE
n cells
EN
OUT1
I
1A
value. Its magnitude is reported in Figure 10.
/ n
(I
1A
I
A
REF
I
1A
+I
VS
2A
+
) / n
A
I
2A
OUT2
DISABLE
I
2A
POWER DMOS
A
/ n
DELAY
n cells
before recovering normal opera-
HIGH SIDE DMOSs OF
THE BRIDGE A
before turning off the bridge
D02IN1353
POWER SENSE
1 cell
EN
value should
EN
and C
L6225
9/20
EN
EN

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