ISL6580CR

Manufacturer Part NumberISL6580CR
DescriptionIC DRIVER HIGH SIDE FET 56-QFN
ManufacturerIntersil
TypeHigh Side/Low Side Driver
ISL6580CR datasheet
 


Specifications of ISL6580CR

Input TypeNon-InvertingNumber Of Outputs12
On-state Resistance20 mOhmCurrent - Output / Channel25A
Current - Peak Output35AVoltage - Supply5 V ~ 12 V
Operating Temperature0°C ~ 85°CMounting TypeSurface Mount
Package / Case56-VQFNLead Free Status / RoHS StatusContains lead / RoHS non-compliant
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Data Sheet
Integrated Power Stage
Processors that operate above 1GHz require fast, intelligent
power systems. The ISL6580 Integrated Power Stage is a
High Side FET/driver combination that provides high current
capability per converter phase at high switching frequency.
The chip incorporates intelligence to provide fast transient
response and digital communication to the ISL6590 Digital
Controller. The ISL6580 integrates key power stage
components for fast power delivery, effective thermal design
and increased noise immunity. It incorporates an integrated
P-channel high side MOSFET, high side MOSFET driver and
a driver for external synchronous rectifier, low side
MOSFETs. The ISL6580 also features a window comparator
for fast transient response as well as on-board voltage and
current A/D converters for intelligent digital communication
and control by the ISL6590 Controller.
Furthermore, through the communication bus, configuration
and fault monitoring via the ISL6590 are available.
For more information, see the ISL6590 datasheet.
Ordering Information
TEMP. RANGE
o
PART NUMBER
(
C)
PACKAGE
ISL6580CR
0 to 70
56 Ld 8x8 QFN L56.8x8C
ISL6580CR-T
56 Ld QFN Tape & Reel
ISL6580/90EVAL1 Evaluation Board
ISL6580/90EVAL2 Evaluation Board
ISL6580/90EVAL3 Evaluation Board
Pinout
ISL6580 (QFN)
TOP VIEW
SDATA
1
PWM
2
NDRIVE
3
GND
4
VSW
5
VSW
6
VSW
7
VCC
VSW
8
VSW
9
VSW
10
VSW
11
GND
12
GND
13
VDRIVE
14
1
Copyright © Intersil Americas Inc. 2003. All Rights Reserved. Primarion is a registered trademark of Primarion, Inc. Primarion PowerCode is a trademark of Primarion, Inc
September 2003
Features
• Optimized for Intel VR10 applications
• V
= 12V
IN
• Phase switching frequencies of 250kHz to 1MHz
• Phase current capability up to 25A
• High Side P-channel MOSFET
• Low Side MOSFET drivers
• Accurate, lossless, Current Sense
• Programmable MOSFET non-overlap timing (through the
ISL6590 Digital Controller)
• Active Transient Response (ATR) minimizes voltage
droop/overshoot during large load current transients.
• Serial control interface for system monitoring and
configuration (with ISL6590 Controller)
- Input Under Voltage Protection
- Output Under/Over Voltage Protection
- Peak Current Limit
PKG.
- Thermal Shutdown
DWG. #
- ATR Limits
• Provides an optimal power solution when combined with
the ISL6590 Digital Controller
- Output voltage regulation range of 0.3VDC to 1.85VDC
- VRM-9 and VRM-10 VID Codes
• Digital interface for high noise immunity and point-of-load
placement
• On board analog-to-digital converters
- 10 Msample/sec voltage A/D
- 1 Msample/sec current A/D
Related Literature
• ISL6590 Datasheet
42
SOC
• Technical Brief TB363 “Guidelines for Handling and
41
IS_PLUS
Processing Moisture Sensitive Surface Mount Devices
40
IS_MINUS
39
GND
(SMDs)”
38
VSW
• Technical Brief TB379 “Thermal Characterization of
37
VSW
Packaged Semiconductor Devices”
36
VSW
35
VSW
• Technical Brief TB389 “PCB Land Pattern Design and
34
VSW
Surface Mount Guidelines for QFN (MLFP) Packages”
33
VSW
32
VSW
31
GND
30
GND
29
VDRIVE
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
|
1-888-INTERSIL or 321-724-7143
Intersil (and design) is a registered trademark of Intersil Americas Inc.
All other trademarks mentioned are the property of their respective owners.
ISL6580
FN9060.2

ISL6580CR Summary of contents

  • Page 1

    ... ISL6590 are available. For more information, see the ISL6590 datasheet. Ordering Information TEMP. RANGE o PART NUMBER ( C) PACKAGE ISL6580CR 8x8 QFN L56.8x8C ISL6580CR QFN Tape & Reel ISL6580/90EVAL1 Evaluation Board ISL6580/90EVAL2 Evaluation Board ISL6580/90EVAL3 Evaluation Board Pinout ISL6580 (QFN) TOP VIEW SDATA 1 PWM 2 ...

  • Page 2

    Block Diagram Typical Power Stage Schematic 2 ISL6580 ...

  • Page 3

    Typical Application 3.3 V 1.8 V VDD_IO VDD_CORE ERR SOC VID[0:5] SCLK SDATA PWRGD SYSCLK OUTEN PWM IDIG NDRIVE ARX ATX ISL6590 ATRH ATRL OSC_IN OSC_OUT PWM IDIG NDRIVE TEST1 TEST2 TEST3 TEST4 MDO MDI MCS MCLK PWM IDIG NDRIVE ...

  • Page 4

    ... Functional Pin Description PIN # NAME I/O TYPE 1 SDATA I/O 3.3V CMOS Digital I/O; serial data line that carries configuration and monitoring information to and from the Intersil 2 PWM I 3.3V CMOS Digital input; pulse width modulation input to the high side driver. 3 NDRIVE I 3.3V CMOS Digital input; multifunction pin used for assigning device ID at startup. During operation, provides ...

  • Page 5

    ... LV ANALOG Low voltage analog input; positive input for the remote sense used to differentially sense the regulated 55 VDD I VDD 56 SCLK I 3.3V CMOS Digital input; typically 16.67MHz clock supplied by the Intersil ISL6590 digital controller for the PADDLE VCC I VCC Side Bar VSW O HV ANALOG Drain of high side PFET. When the PWM signal is high, VCC is switched to VSW ...

  • Page 6

    Absolute Maximum Ratings ...

  • Page 7

    Electrical Specifications V = 3.3VDC 25°C Unless Otherwise Specified (Continued) A PARAMETER LOGIC SIGNAL EXPECTED RANGES (PWM, SCLK, SDATA, SOC, CLK, NDRIVE) HIGH voltage Logic Level HIGH Voltage Range LOW voltage Logic Level LOW Voltage Range ...

  • Page 8

    Electrical Specifications V = 3.3VDC 25°C Unless Otherwise Specified (Continued) A PARAMETER (Output = I = 7-bit serial signal, first bit = START bit, 6 bit current word length (MSB first), 66MHz clock frequency) DIG CURRENT ...

  • Page 9

    Electrical Specifications V = 3.3VDC 25°C Unless Otherwise Specified (Continued) A PARAMETER ATRH (ACTIVE TRANSIENT RESPONSE HIGH) Step ATRH Step Range ATRH adjustment Range Default Address Register Default ATRL (ACTIVE TRANSIENT RESPONSE LOW) Step ATRL Step ...

  • Page 10

    To understand the reduction of ripple current amplitude in the multi-phase circuit, examine the equation representing an individual channel’s peak-to-peak inductor current – IN OUT OUT I = ----------------------------------------------------- - ...

  • Page 11

    Voltage Identification Codes (VID) V (V) VID4 VID3 VID2 VID1 OUT 0.8375 0.8500 0.8625 0.8750 0.8875 0.9000 0.9125 0.9250 ...

  • Page 12

    ... This gives the designer complete flexibility within the specified "max" and "min" limits. Current Sensing Current sensing is a key feature in the Intersil Digital Architecture. Precision current sensing is required to maintain accurate load lines, good current sense balancing between phases, thermal balancing, overload current, and peak current limit protection ...

  • Page 13

    ... The master oscillator frequency inside the Intersil Digital Architecture is 133.33MHz. Figure 9 shows the voltage drop across the sense resistor, the voltage at the switch node, the inductor current, and the digital voltage signal ...

  • Page 14

    Above the resonant frequency of the output LC filter (10kHz in this case) the gain falls at a rate of 40dB/decade and the phase shift approaches –180 degrees frequency above the F = 1/(2ðC*ESR) = 500kHz in this ...

  • Page 15

    FIGURE 16. DESIGN PARAMETER INPUT WINDOW FIGURE 17. SMALL SIGNAL DESIGN WINDOW 15 ISL6580 FIGURE 18. BODE PLOT F = Frequency of first zero Frequency of second zero Gain * frequency of first pole ...

  • Page 16

    Compensation Methodology Due to the user interface software interface very easy to change the frequency compensation and see the resulting performance on a scope or network analyzer. Transient response is viewed by applying a transient load and monitoring ...

  • Page 17

    FIGURE 22. ILLUSTRATION OF ATR AND NON-ATR PHASE AND TOTAL CURRENT ATRL threshold ATRL threshold VID VID V V out out ATRH threshold ATRH threshold ...

  • Page 18

    ATRL ATRL ATRL ATRH ATRH ATRH NFET NFET NFET NFET NFET NFET i+1 i+1 i+1 PFET PFET PFET PFET PFET PFET i+1 i+1 i+1 NDRIVE NDRIVE NDRIVE NDRIVE NDRIVE NDRIVE i+1 ...

  • Page 19

    FIGURE 26. BLOCK DIAGRAM OF PEAK CURRENT LIMITING The second way of responding to a Current Over Load is performed in the ISL6590 controller. If the sum of the average currents in all phases exceeds the Over Current Limit for ...

  • Page 20

    OUT_EN or power to the ISL6590 is cycled. The threshold has hysteresis to eliminate oscillation. When V is low (below 7V), a bit in the status register is set CC high rises from a ...

  • Page 21

    ... MOSFET Selection In the Intersil Digital Multiphase Architecture, a critical component selection is the low side MOSFET. The power dissipation from the low and high side MOSFET is dominated by different factors. Because of the longer duty ...

  • Page 22

    FIGURE 34. POWER DISSIPATION FOR STATIC AND DYNAMIC OPERATION The key characteristic for the low side MOSFET is the DC Rdson resistance important to get a very low Rdson value for the low side FET. For the high ...

  • Page 23

    The turn off of the MOSFET is fundamentally the same as the turn on in reverse order (Figure 36). V level required to maintain the drain current (beginning of t4). At that point, V begins to rise at a rate ...

  • Page 24

    The larger the die size, the higher the part costs but more effective heat flux occurs. A smaller die size can be used with a larger heat sink ...

  • Page 25

    High Side FET. Figure 40 shows the waveform at the switch node with and without a Schottky diode ttky Dio ttk y Dio ...

  • Page 26

    This provides a predicted average current per power stage (Figure 42). If any individual power stage reaches this over current protection level, the VRM shuts down and reports an over current fault condition. This protection feature can be disabled ...

  • Page 27

    ESR and the ESL of the output capacitor can be substantial, as expressed below ESL ESR in in out out where V is the output ...

  • Page 28

    DRIVE Maximum Recommended LS FET Gate Capacitance 20.0 18.0 16.0 14.0 12.0 10.0 8.0 6.0 4.0 2.0 0.0 200 400 600 Frequency [KHz] FIGURE 45. MAXIMUM GATE ...

  • Page 29

    ... User Interface Software The configuration of the ISL6590 controller and the ISL6580 power stages can be adjusted using Primarion ( ) PowerCode tm user interface software (provided by Intersil Pull Down Menus Click on Text for Descriptions 29 ISL6580 and our partner Primarion). Below are screen shots showing data entry points, pull down menus and buttons for help and a tutorial. the user interface allows the designer to adjust the ® ...

  • Page 30

    ... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

  • Page 31

    ... The pin #1 identifier may be ei- ther a mold or mark feature. which provide improved electrical and thermal performance. tern Design efforts, see Intersil Technical Brief TB389. MAX NOTES 0. ...