L6258EXTR STMicroelectronics, L6258EXTR Datasheet

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... DC motors. Table 1. Device summary Order code E-L6258EX E-L6258EXTR December 2007 high current DMOS universal motor driver The power stage is a dual DMOS full bridge capable of sustaining up to 40V, and includes the diodes for current recirculation.The output current capability is 1 ...

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Contents Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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L6258EX List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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List of figures List of figures Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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L6258EX 1 Block diagram Figure 1. Block diagram C VCP2 P VCP1 CHARGE PUMP VREF1 I3_1 I2_1 DAC I1_1 I0_1 PH_1 V (5V) VR GEN DD VREF1 I3_2 I2_2 DAC I1_2 I0_2 PH_2 TRI_CAP TRI_0 TRIANGLE GENERATOR TRI_180 C FREF ...

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Block diagram Figure 2. Pin connection (top view) PWR_GND OUT1A DISABLE TRI_CAP VCP1 VCP2 VBOOT OUT2A PWR_GND Table 3. Pin functions Pin # 6/ PH_1 3 I1_1 4 I0_1 ...

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L6258EX Table 3. Pin functions (continued) Pin # 13 18 Note: The number in parenthesis ...

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Block diagram Figure 3. Thermal characteristics Conditions pad layout + ground layers + 16 via hol PCB ref.: 4 LAYER pad layout + ground layers PCB ref.: 4 LAYER pad layout + ...

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L6258EX Table 4. Electrical characteristics (continued Parameter ΔT Shut down hysteresis SD-H T Thermal shutdown SD Triangular oscillator f osc frequency TRANSISTORS I Leakage current DSS R On resistance ds(on) V Flywheel diode voltage f CONTROL LOGIC V ...

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Functional description 2 Functional description The circuit is intended to drive both windings of a bipolar stepper motor or two DC motors. The current control is generated through a switch mode regulation. With this system the direction and the amplitude ...

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L6258EX 2.1 Reference voltage The voltage applied to VREF pin is the reference for the internal DAC and, together with the sense resistor value, defines the maximum current into the motor winding according to the following relation: where R = ...

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Functional description Figure 5. Current control loop block diagram INPUT TRANSCONDUCTANCE AMPL. ia VREF VDAC DAC - Gin=1/Ra 2.2 Input logic (I The current level in the motor winding is selected according to this ...

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L6258EX Table 5. Current levels (continued 2.3 Phase input ( PH ) The logic level applied to this input determines the direction of the current flowing in the winding of the motor. High level ...

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Functional description 2.6 Current control loop The current control loop is a transconductance amplifier working in PWM mode. The motor current is a function of the programmed DAC voltage. To keep under control the output current, the current control modulates ...

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L6258EX With a positive differential voltage on V positively unbalanced respected Vr. In this case being the error amplifier output voltage greater than Vr, the output of the first comparator is a square wave with a duty cycle higher than ...

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PWM current control loop 3 PWM current control loop 3.1 Open loop transfer function analysis Block diagram: refer to Input parameters: ● 24V S ● 12mH L ● 12Ω L ● 0.33Ω ...

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L6258EX Gain and bandwidth must be chosen depending on many parameters of the application, like the characteristics of the load, power supply etc..., and most important is the stability of the system that must always be guaranteed. To have a ...

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PWM current control loop Moreover, having the two references Tri_0 and Tri_180 a triangular shape it is clear that the transfer function of this block is a linear constant gain without poles and zeros. 3.3 Load attenuation The load block ...

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L6258EX Before analysing the error amplifier block and the sense transconductance block, we have to do this consideration: Aloop = Ax| = ACpw and Bx| = ACerr this means that Ax|dB ...

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PWM current control loop because ib = icwe have: In the case of no external RC network is used to compensate the error amplifier, the typical open loop transfer function of the error plus the sense amplifier is something with ...

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L6258EX In this case the Bx block has a DC gain equal to the open loop and equal to zero at a frequency given by the following formula: In order to cancel the pole of the load, the zero of ...

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PWM current control loop Figure 9. Aloop bode plot (compensated) We can see that the effect of the load pole is cancelled by the zero of the Bx block ; the total Aloop cross a the 0dB axis with a ...

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L6258EX Figure 10. Electrical model of the load OUT+ OUT- The schematic now shows the equivalent circuit of the stepper motor including a sine wave voltage generator of the Bemf. The Bemf voltage of the motor is not constant, its ...

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Application information 4 Application information A typical application circuit is shown in Note: For avoid current spikes on falling edge of DISABLE a "DC feedback" would be added to the ERROR Amplifier. (R1-R2 on 4.1 Interference Due to the fact ...

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L6258EX Figure 11. Typical application circuit VCP1 10nF VCP2 VBOOT 100nF VS TRI_CAP 1nF DISABLE 4.2 Motor selection Some stepper motor have such high core losses that they are not suitable for switch mode current regulation. Furthermore, some stepper motors ...

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Application information 4.4 Notes on PCB design We recommend to observe the following layout rules to avoid application problems with ground and anomalous recirculation current. The by-pass capacitors for the power and logic supply must be kept as near as ...

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L6258EX 5 Operation mode time diagrams Figure 12. Full step operation mode timing diagram (Phase - DAC input and motor current) Position 0 5V Phase Phase I0_1 0 5V I1_1 0 DAC 1 Inputs ...

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Operation mode time diagrams Figure 13. Half step operation mode timing diagram (Phase - DAC input and motor current) Phase 1 Phase 2 I0_1 DAC 1 I1_1 Inputs I2_1 I3_1 I0_2 I1_2 DAC 2 Inputs I2_2 I3_2 100% 71.4% Motor ...

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L6258EX Figure 14. 4 bit microstep operation mode timing diagram (Phase - DAC input and motor current) Position Phase Phase 5V 2 I0_1 0 5V I1_1 0 DAC 1 Inputs 5V I2_1 0 5V ...

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Package information 6 Package information In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the ...

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L6258EX 7 Revision history Table 7. Document revision history Date 15-Sep-2003 11-May-2004 24-Sep-2004 28-Feb-2005 23-Mar-2005 03-Dec-2007 Revision 1 First Issue in the EDOCS DMS. Restyling of the graphic form, changed all V 2 delete TSD parameter in the Electrical characteristic ...

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