SG6932SZ Fairchild Semiconductor, SG6932SZ Datasheet - Page 15

• Manufacturer Part Number: SG6932SZ
• Description: IC PFC CONTROLLER CCM 16SOP
• Manufacturer: Fairchild Semiconductor

Specifications of SG6932SZ

• Mode: Continuous Conduction (CCM)
• Frequency - Switching: 65kHz
• Current - Startup: 10µA
• Voltage - Supply: 14 V ~ 20 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

© 2007 Fairchild Semiconductor Corporation
SG6932 • Rev. 1.1.3
Cycle-by-Cycle Current Limiting
SG6932 provides cycle-by-cycle current limiting for
both PFC and PWM stages. Figure 29 shows the peak
current limit for the PFC stage. The PFC gate drive is
terminated once the voltage on the ISENSE pin goes
below V
The V
relationship between V
The amplitude of the constant current, I
by the internal current reference, I
following equation:
Therefore, the peak current of the I
(V
Power-On Sequence and Soft-Start
The SG6932 is enabled whenever the line voltage is
higher than the brownout threshold. Once the SG6932
is active, the PFC stage is enabled first. The PWM
stage is enabled following a 4ms delay time after
FBPFC voltage exceeds 2.7V. During start-up of PWM
stage, the SS pin charges an external capacitor with a
constant current source. The voltage on FBPWM is
clamped by SS during start-up. In the event of a
protection condition occurring and/or PWM being
disabled, the SS pin is quickly discharged.
RMS
<1.05V):
FBPFC
OPFC
OPWM
RMS
PK
.
Figure 30. Power-On Sequence
voltage determines the V
I
S
_
I
P
Figure 29. Current Limit
peak
=
2
=
×
I
I (
T
PK
P
=
×
2
and V
R
×
P
R
. 1
)
S
4ms
−
( 2
R
0
V
I
RMS
2 .
)
(V)
is shown in Figure 29.
T
2.7V
, according to the
PK
P,
S
is determined
voltage. The
is given by
3V
(7)
(8)
15
Forward PWM and Slope Compensation
The PWM stage is designed for forward power
converters. Peak-current-mode control is used to
optimize system performance. Slope compensation is
added to stabilize the current loop. The SG6932 inserts
a synchronized, positively sloped ramp at each
switching
represented by the voltage signal V
example, the voltage of the ramp signal is 0.55V.
Limited Power Control
Every time the output of power supply is shorted or
overloaded, the FBPWM voltage increases. If the FB
voltage is higher than a designed threshold of 4.2V for
longer than 95ms, the PWM output is turned off.
Gate Drivers
SG6932 output stages are fast totem-pole gate drivers.
The output driver is clamped by an internal 18V Zener
diode to protect the power MOSFET.
Protections
The SG6932 provides full protection functions to
prevent the power supply and the load from being
damaged. The protection features include:
PFC Feedback Over-Voltage Protection. When the
PFC feedback voltage exceeds the over-voltage
threshold, SG6932 inhibits the PFC switching signal.
This protection prevents the PFC power converter from
operating abnormally while the FBPFC pin is open.
Second PFC Over-Voltage Protection (OVP_PFC). The
PFC stage over-voltage input. The comparator disables
the PFC output driver if this input exceeds 3.25V. This
pin can be connected to the FBPFC pin or the PFC
boost output through a divider network. This pin
provides an extra input for PFC over-voltage protection.
PFC Feedback Under-Voltage Protection. The SG6932
stops the PFC switching signal whenever the PFC
feedback voltage drops below the under-voltage
threshold. This protection feature prevents the PFC
power converter from experiencing abnormal conditions
while the FBPFC pin is shorted to ground.
V
stages are disabled whenever the V
the over-voltage threshold.
RI Pin Open / Short Protection. The RI pin is used to
set the switching frequency and internal current
reference. The PFC and PWM stages of SG6932 are
disabled whenever the RI pin is short or open.
FBPWM
DD
Over-Voltage Protection. The PFC and PWM
SG69XX
Figure 31. Slope Compensation
cycle. The positively sloped ramp is
0.7V
0.55V
+
+
DD
IPWM
voltage exceeds
s-comp
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. In this