L6563 STMicroelectronics, L6563 Datasheet
L6563
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L6563 Summary of contents
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... L6563A L6563ATR INV COMP MULT Ideal diode - MULTIPLIER + 2.5V Voltage VOLTAGE references - + from REGULATOR VFF Vbias INDUCTOR (INTERNAL SUPPLY BUS) SATURATION DETECTION ( not in L6563A ) R Q UVLO R1 COMPARATOR S + UVLO - R2 V REF2 ZERO CURRENT DETECTOR - + DISABLE 9 PWM_STOP PWM_LATCH Rev 4 L6563A SO-14 Package SO-14 ...
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... Voltage Feedforward . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 6.4 THD optimizer circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 6.5 Tracking Boost function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6.6 Inductor saturation detection (L6563 only 6.7 Power management/housekeeping functions . . . . . . . . . . . . . . . . . . . . . . 28 6.8 Summary of L6563/A idle states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 7 Application examples and ideas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 2/39 L6563 - L6563A ...
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... PFC stage (feedback loop failure, boost inductor's core saturation) in the L6563 only and to disable the PFC stage in case of light load for the DC- DC converter make it easier to comply with energy saving norms (Blue Angel, EnergyStar, Energy2000, etc ...
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... MULT (pin 3), compensates the control loop gain dependence on the mains voltage. Never connect the pin directly to GND. 4/39 INV 1 14 COMP 2 13 MULT VFF 5 10 TBO 6 9 PFC_OK 7 8 Description 2 function. A capacitor and a parallel resistor must be L6563 - L6563A Vcc GD GND ZCD RUN PWM_STOP PWM_LATCH ...
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... PFC_OK (pin voltage above 1. (pin PWM_LATCH L6563 is detected the pin is asserted high. Normally, this pin is used to stop the operation of the DC-DC converter supplied by the PFC pre-regulator by invoking a latched disable of its PWM controller. If not used, the pin will be left floating. ...
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... Junction temperature operating range J T Storage temperature STG 3 Thermal data Table 4. Thermal data Symbol R Maximum thermal resistance junction-ambient thJA 6/39 Parameter = 1 mA) pin = 50°C A Parameter L6563 - L6563A Value Unit self-limited V -0 Self-limited -10 (source (sink) 0.75 W -25 to 150 °C -55 to 150 °C ...
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... L6563 - L6563A 4 Electrical characteristics Table 5. Electrical characteristics ( -25°C < T < +125° 12V and GND; unless otherwise specified) Symbol Parameter Supply voltage Vcc Operating range Vcc Turn-on threshold On Vcc Turn-off threshold Off Hys Hysteresis V Zener Voltage Z Supply current I Start-up current start-up I Quiescent current ...
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... Input bias current CS t Leading edge blanking LEB td Delay to output (H-L) Current sense reference V CSclamp clamp Vcs Current sense offset offset Ic latch-off level (L6563 V CSdis only) Output overvoltage Dynamic OVP triggering I OVP current Hys Hysteresis Static OVP threshold Voltage feedforward V Linear operation range ...
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... L6563 - L6563A Table 5. Electrical characteristics (continued) ( -25°C < T < +125° 12V and GND; unless otherwise specified) Symbol Parameter Zero current detector V Upper clamp voltage ZCDH V Lower clamp voltage ZCDL Arming voltage V ZCDA (positive-going edge) Triggering voltage V ZCDT (negative-going edge) I Input bias current ...
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... RUN (2) Voltage falling (2) Voltage rising GDsource I = 200 mA GDsource I = 200 mA GDsink I = 5mA; Vcc = 20V GDsource Vcc=0 to Vcc , I =10mA On sink ⋅ MULT ⋅ ------------------------------------------------------------ - L6563 - L6563A =1µF between pin V FF Min Typ Max -1 0.5 0.52 0.54 0.56 0.6 0.64 75 150 300 2 2 – ...
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... L6563 - L6563A 5 Typical electrical performance Figure 4. Supply current vs supply voltage Icc Icc (mA) (mA 0.5 0.5 0.1 0.1 0.05 0.05 0.01 0.01 0.005 0.005 Vcc(V) Vcc(V) Figure 6. IC consumption vs T Icc Icc 10 10 (mA) (mA Vcc = 12 V Vcc = 12 V 0.5 0 kHz kHz 0.2 ...
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... Vpin4 Vpin4 2.0 2.0 (V) (V) Vcc = 12 V Vcc = 12 V 1.8 1.8 1.6 1.6 1.4 1.4 1.2 1.2 1.0 1.0 100 100 150 150 L6563 - L6563A J Vcc = 12 V Vcc = Upper clamp = Upper clamp COMP COMP 1 1 -50 - 100 100 Tj (°C) Tj (°C) mains voltage phase angle ...
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... L6563 - L6563A Figure 16. Multiplier characteristics @ (pin 4) (pin (V) (V) upper voltage upper voltage Vcc = 12 V Vcc = 12 V clamp clamp ° ° 0.8 0.8 0.6 0.6 0.4 0.4 0.2 0 0.2 0.2 0.4 0.4 0.6 0.6 0.8 0 (pin 3) (V) (pin 3) (V) MULT MULT Figure 18. Multiplier characteristics @ V ...
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... Figure 27. PWM_STOP low saturation Vpin9 Vpin9 (V) (V) Vcc = 12 V Vcc = 12 V Vpin3 Vpin3 100 100 150 150 L6563 - L6563A J 1.0 1.0 Vcc = 12 V Vcc = 12 V 0.8 0 0.6 0.6 OFF OFF 0.4 0.4 0.2 0.2 0.0 0.0 ...
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... L6563 - L6563A Figure 28. PFC_OK thresholds vs T Vpin7 Vpin7 3.0 3.0 (V) (V) 2.0 2.0 Latch-off Latch-off 1.0 1.0 0.5 0.5 0.3 0 0.2 0.2 OFF OFF 0.1 0.1 -50 - (°C) Tj (°C) Figure 30. Start-up timer vs T Tstart Tstart 150 150 (µs) (µs) Vcc = 12 V Vcc = 12 V ...
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... The output overvoltage that is able to trigger the OVP function is then: Equation 3 16/39 V – 2 ------- - = --------------------- - ∆ V – 2 --------------------------------------- - ∆V = I’ - I’ /R1 will flow through the compensation network ∆ · 20 · L6563 - L6563A of the PFC pre-regulator O 2.5 O ...
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... Example Then 40V/20µA = 2MΩ 2.5·2MΩ·/(400-2.5) = 12.58kΩ. The tolerance on the OVP level due to the L6563/A will be 40·0. that is ± 1.36%. When either OVP is activated the quiescent consumption is reduced to minimize the discharge of the Vcc capacitor. Figure 34. Output voltage setting, OVP and FFP functions: internal block diagram ...
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... IC in the cascaded DC-DC converter, so that the entire unit is latched off. To restart the system it is necessary to recycle the input power, so that the Vcc voltages of both the L6563/A and the PWM controller go below their respective UVLO thresholds. The PFC_OK pin doubles its function as a not-latched IC disable: a voltage below 0.2V will shut down the IC, reducing its consumption below 1 mA ...
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... L6563 - L6563A Figure 35. Voltage feedforward: squarer-divider (1/V characteristic E/A output current (V COMP reference (Vcsx) MULTIPLIER 2 1/V L6563 L6563A VFF this way a change of the line voltage will cause an inversely proportional change of the half sine amplitude at the output of the multiplier (if the line voltage doubles the amplitude of ...
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... L 2V ∆ MULTpk V = --------------------------------------- component, will be: L 100 --------------------------------- 3 2π harmonic distortion. Always connect function of 3 harmonic distortion introduced in the input [ 0.01 0.1 L6563 - L6563A is triangular with a peak-to harmonic distortion introduced by this ·C based on the FF FF and the FF Figure 35), pin is FF ...
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... L6563 - L6563A 6.4 THD optimizer circuit The L6563/A is provided with a special circuit that reduces the conduction dead-angle occurring to the AC input current near the zero-crossings of the line voltage (crossover distortion). In this way the THD (Total Harmonic Distortion) of the current is considerably reduced. A major cause of this distortion is the inability of the system to transfer energy effectively when the instantaneous line voltage is very low ...
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... Application information Figure 38. THD optimization: standard TM PFC controller (left side) and L6563/A (right side) Rectified mains voltage Imains Input current Essentially, the circuit artificially increases the ON-time of the power switch with a positive offset added to the output of the multiplier in the proximity of the line voltage zero-crossings. ...
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... L6563 - L6563A 6.5 Tracking Boost function In some applications it may be advantageous to regulate the output voltage of the PFC pre- regulator so that it tracks the RMS input voltage rather than at a fixed value like in conventional boost pre-regulators. This is commonly referred to as "tracking boost" or "follower boost" approach. ...
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... R 2 Vin 2 ⋅ ⋅ -------------------------------------------------------------------------------------------------- Vin ⋅ Vo – 2 Vin – Vin 2 1 ⋅ ⋅ ⋅ ----------------------------- - = T Vo – L6563 - L6563A Vox Vo – 2 ⋅ -------------------------- - Vin 1 Vo – This will result in a limitation of the = Vin ) x clamp 6 Vin – Vin ⋅ – Vo – 2 ...
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... L6563 - L6563A 5. Check that the maximum current sourced by the TBO pin (pin 6) does not exceed the maximum specified (0.25mA): Equation 10 In the following Mathcad® sheet example, the calculation is shown for the circuit illustrated in Figure function. Design data Vin := 88V 1 Vin ...
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... Vo – ⋅ T ← ⋅ ⋅ MULTpk ← TBO MULTpk ⎛ ⎞ R1 ⋅ 2 ------- - + V ⎝ ⎠ R2 100 150 L6563 - L6563A R2 = 4.762 Vin ⋅ 2.114 0.142 mA TBOmax Vo(Vin ) = 200V 1 < ) Vo(Vin ) = 385V 3 MULTpk R1 ⋅ ------- - Vo(Vin ) = 391.307V TBO Vin 2 Vin x 200 250 Vin Ω ...
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... 6.6 Inductor saturation detection (L6563 only) Boost inductor's hard saturation may be a fatal event for a PFC pre-regulator: the current upslope becomes so large (50-100 times steeper, see sense propagation delay the current may reach abnormally high values. The voltage drop caused by this abnormal current on the sense resistor reduces the gate-to-source voltage, so that the MOSFET may work in the active region and dissipate a huge amount of power, which leads to a catastrophic failure after few switching cycles ...
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... Also the cascaded DC-DC converter can be stopped via the PWM_LATCH pin that is asserted high. In this way the entire system is stopped and enabled to restart only after recycling the input power, that is when the Vcc voltages of the L6563 and the PWM controller go below their respective UVLO thresholds. System safety will be considerably increased ...
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... L6563 - L6563A Figure 43. Interface circuits that let DC-DC converter’s controller IC disable the L6563/A at light load 16 ST-BY L5991/A 4 Vref 27 k Ω 100 nF BC557 100 150 k Ω k Ω 150 k Ω BC557 10 k Ω 8.2 V Vcc 16 2.2 k L6668 14 PFC_STOP The third communication line is the PWM_STOP pin (pin 9), which works in conjunction with the RUN pin (pin 10) ...
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... Application information Figure 44. Interface circuits that let the L6563/A switch on or off a PWM controller If this is not the case not possible to achieve a start-up delay long enough (because this prevents the DC-DC stage from starting up correctly) or, simply, the PWM controller is devoid of soft start, the arrangement of the voltage generated by the PFC stage reaches a preset value ...
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... Figure 46. Brownout protection (master PFC) AC mains 6.8 Summary of L6563/A idle states . Table 6. Summary of L6563/A idle states Condition UVLO Feedback PFC_OK > 2.5 V disconnected Saturated Boost Inductor ...
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... C7 4.7 nF R10 15.8 kΩ Boost inductor spec: E25x13x7 core, 3C85 ferrite or equivalent 1.6 mm gap for 0.43 mH primary inductance Primary: 80 turns 20 x 0.1 mm Secondary: 9 turns 0.1 mm Figure 48. EVAL6563-80W: PCB and component layout (Top view, real size mm) 32/39 Daux 1N4007 R3B 1N4148 R2 120 kΩ ...
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... L6563 - L6563A Figure 49. EVAL6563-80W: PCB layout, soldering side (Top view) Table 7. EVAL6563-80W: Evaluation results at full load Vin (V ) Pin ( 85.3 115 84.9 135 83.7 180 83.5 230 85.2 265 85.0 Note: Measurements done with the line filter shown in Table 8. EVAL6563-80W: Evaluation results at half load ...
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... Application examples and ideas Figure 50. EVAL6563-80W: Vout vs. Vin relationship (tracking boost) Figure 51. Line filter (not tested for EMI compliance) used for EVAL6563-80W evaluation 34/39 L6563 - L6563A ...
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... L6563 - L6563A Figure 52. 250W, wide-range-mains PFC pre-regulator with fixed output voltage R1A 820 k R1B C1 B1 820 k 1 µF KBU8M + FUSE 400V 8A/250V Vac - 88V to 264V 10nF Boost Inductor (L1) Spec ETD29x16x10 core, 3C85 ferrite or equivalent 1.5 mm gap for 150 µH primary inductance Primary: 74 turns 20xAWG30 ( Secondary: 8 turns 0 ...
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... Application examples and ideas Figure 54. Demagnetization sensing without auxiliary winding V inac Figure 55. Enhanced turn-off for big MOSFET driving L6563A 36/39 C ZCD R ZCD ZCD 9 L6563 L6563A Vcc DRIVER L6563 12 GND L6563 - L6563A V out R load Q BC327 Rs ...
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... L6563 - L6563A 8 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label ...
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... Revision 1 First issue 2 Changed the maturity from “Preliminary data” to “Datasheet” Added new part number L6563A 3 Updated the Section 4 on page 7 document has been reformatted Replaced block diagram, added 4 editor changes. L6563 - L6563A Changes (Table 2) & ...
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... L6563 - L6563A Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...