ICE2PCS02 Infineon Technologies, ICE2PCS02 Datasheet - Page 11

• Manufacturer Part Number: ICE2PCS02
• Description: IC PFC CONTROLLER CCM 8DIP
• Manufacturer: Infineon Technologies
• Type: Standalone PFC Controller in Continuous Conduction Moder

Specifications of ICE2PCS02

• Package / Case: 8-DIP
• Mode: Continuous Conduction (CCM)
• Frequency - Switching: 65kHz
• Current - Startup: 450µA
• Voltage - Supply: 11 V ~ 25 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Through Hole
• Switching Frequency: 65 KHz
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: SP000094398

voltage at pin VCOMP. This block has been designed
to support the wide input voltage range (85-265VAC).
3.7
The PWM logic block prioritizes the control input
signals and generates the final logic signal to turn on
the driver stage. The speed of the logic gates in this
block, together with the width of the reset pulse T
are designed to meet a maximum duty cycle D
95% at the GATE output.
In case of high input currents which result in Peak
Current Limitation, the GATE will be turned off
immediately and maintained in off state for the current
PWM cycle. The signal Toffmin resets (highest priority,
overriding other input signals) both the current limit
latch and the PWM on latch as illustrated in Figure 13.
Figure 13 PWM Logic
3.8
The voltage loop is the outer loop of the cascaded
control scheme which controls the PFC output bus
voltage V
sensing voltage at VSENSE which is a resistive divider
tapping from V
OTA1 which has an accurate internal reference of 3V
(±2%). Figure 14 shows the important blocks of this
voltage loop.
3.8.1
The compensation of the voltage loop is installed at the
VCOMP pin (see Figure 14). This is the output of OTA1
and the compensation must be connected at this pin to
ground. The compensation is also responsible for the
soft start function which controls an increasing AC input
current during start-up.
Version 2.3
PWM on signal
Current Loop
Peak Current
Toffmin
385ns
PWM Logic
Voltage Loop
OUT
Voltage Loop Compensation
Limit
. This loop is closed by the feedback
OUT
. The pin VSENSE is the input of
Limit Latch
Current
PWM on
S
R
Latch
S
R
L1
L2
Q
Q
G1
turn GATE on
HIGH =
OFFMIN
MAX
of
,
11
Figure 14
3.8.2
Due to the low frequency bandwidth of the voltage loop,
the dynamic response is slow and in the range of about
several 10ms. This may cause additional stress to the
bus capacitor and the switching transistor of the PFC in
the event of heavy load changes.
The IC provides therefore a “window detector” for the
feedback voltage V
Whenever V
by +5%, it will act on the nonlinear gain block which in
turn affect the gate drive duty cycle directly. This
change in duty cycle is bypassing the slow changing
VCOMP voltage, thus results in a fast dynamic
response of V
3.9
The output gate driver is a fast totem pole gate drive. It
has an in-built cross conduction currents protection and
a Zener diode Z1 (see Figure 15) to protect the external
transistor switch against undesirable over voltages.
The maximum voltage at pin 8 (GATE) is typically
clamped at 15V.
ICE2PCS02/G
Full-wave
Retifier
Av(I
From
V
IN
IN
)
PWM Generation
Current Loop
Output Gate Driver
Enhanced Dynamic Response
Voltage Loop
R7
L1
VSENSE
+
OUT
.
Nonlinear
t
Gain
exceeds the reference value (3V)
VSENSE
C4
Functional Description
R6
D1
Gate Driver
VCOMP
at pin 6 (VSENSE).
OTA1
C2
C5
ICE2PCS02/G
3V
R3
R4
9 Oct 2007
VSENSE
GATE
Vout