ICE1CS02G Infineon Technologies, ICE1CS02G Datasheet - Page 17

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ICE1CS02G

Manufacturer Part Number
ICE1CS02G
Description
IC PFC CTRLR AVERAGE CURR DSO16
Manufacturer
Infineon Technologies
Datasheet

Specifications of ICE1CS02G

Mode
Average Current
Frequency - Switching
65kHz
Current - Startup
1.3mA
Voltage - Supply
11 V ~ 25 V
Operating Temperature
-40°C ~ 150°C
Mounting Type
Surface Mount
Package / Case
DSO-16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
SP000444092
SP000783614

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ICE1CS02G
Manufacturer:
POWERSEM
Quantity:
201
Part Number:
ICE1CS02G
Manufacturer:
INFINEON
Quantity:
101
3.5.8
Figure 25
Whenever MOS switch is switched on, a leading edge
spike
capacitances and the reverse recovery time of
secondary-side rectifier. This spike can cause the gate
drive to switch off unintentionally. In order to avoid a
premature termination of the switching pulse, this spike
is blanked.
3.5.9
Figure 26
The IC will enter into protection, turning off the gate
when voltage at pin 9 (PWM CS) exceed 1.0V for a
period set externally through pin 11 (PWM Pre-short).
The IC will be resetted when IC exit out of PWM BOP.
Version 1.0
PROTECT
Vpreshort
GATE
CS
V
csth
V
1.0V
3.8V
Sense
is
Leading Edge Blanking
Pre-short Protection
generated
Leading Edge Blanking
Pre-short Protection
due
t
LEB
= 220ns
to
the
primary-side
t
17
3.5.10
Figure 27
During External Synchronization, external clock is input
by the synchronization signal input. PFC output is kept
in synchronization with PWM output in 1:2 ratio. The
maximum allowable external sync pulse width off time
is 0.5µs.
3.5.11
Figure 28
The maximum duty cycle is selected based on the
above setting at the PFC Vsense and PWM SYNC
pins.
3.5.12
Figure 29
The IC will enter into slope compensation at PWM CS
pin when Vsync is less than 3.0V.
Synchronization
signal input
>3.0V = OFF
<3.0V = ON
Vsync
SYNC
PWM
Vsense (V)
Vsync (V)
Cycle (%)
Max Duty
Combi PFC/ PWM Controller
10k
External Synchronization
Max Duty Cycle Selection
PWM Slope Compensation
VREF=5V
PWM CS
External Synchronization and Max Duty
Max Duty Cycle Selection Table
PWM slope compensation
Iramp
PWMout
Selection
Max Duty
Functional Description
R
resistor
control
duty
cycle
Rsl_comp
variable to
change slope
for
compensation
Rsl_comp
Rgate
> 3.0
47
-
t
syncmax
V
sync
CoolMOS
Rcs
> 2.6
47
gnd
< 3.0
PWM CS
PWMout
< 2.6
V_Rcs
Islope
voltage at PWM SYNC
60
ICE1CS02
25 July 2008
external clock
pwm_out
pfc_out

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