ICE2PCS01 Infineon Technologies, ICE2PCS01 Datasheet - Page 10

• Manufacturer Part Number: ICE2PCS01
• Description: IC PFC CONTROLLER CCM 8DIP
• Manufacturer: Infineon Technologies
• Type: Standalone PFC Controller in Continuous Conduction Moder

Specifications of ICE2PCS01

• Package / Case: 8-DIP
• Mode: Continuous Conduction (CCM)
• Frequency - Switching: 250kHz
• Current - Startup: 450µA
• Voltage - Supply: 11 V ~ 25 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Through Hole
• Switching Frequency: 136 KHz
• Maximum Operating Temperature: + 150 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: SP000094396

3.6
3.6.1
The complete system current loop is shown in Figure
11.
Figure 11
It consists of the current loop block which averages the
voltage at pin ISENSE, resulted from the inductor
current flowing across R1. The averaged waveform is
compared with an internal ramp in the ramp generator
and PWM block. Once the ramp crosses the average
waveform, the comparator C1 turns on the driver stage
through the PWM logic block. The Nonlinear Gain block
defines the amplitude of the inductor current. The
following sections describe the functionality of each
individual blocks.
3.6.2
The compensation of the current loop is done at the
ICOMP pin. This is the OTA2 output and a capacitor C3
has to be installed at this node to ground (see Figure
11). Under normal mode of operation, this pin gives a
voltage which is proportional to the averaged inductor
current. This pin is internally shorted to 4.2V in the
event of IC shuts down when OLP and UVLO occur.
3.6.3
The IC employs an average current control scheme in
continuous conduction mode (CCM) to achieve the
power factor correction.
Assuming the voltage loop is working and output
voltage is kept constant, the off duty cycle D
CCM PFC system is given as
Version 2.2
D
OFF
C3
ISENSE
ICOMP
=
------------- -
V
V
Average Current Control
Complete Current Loop
R2
Current Loop Compensation
Pulse Width Modulation (PWM)
OUT
IN
Complete System Current Loop
Full-wave
Retifier
ICE2PCS01/G
From
R1
Current Loop
1.0mS
+/-50uA (linear range)
Compensation
Current Loop
Fault
S2
OTA2
L1
4.2V
R7
Inductor current
proportional to
Comparator
averaged
voltage
PWM
D1
Nonlinear
C1
Gain
C2
GATE
Driver
Gate
PWM Logic
R
S
R3
Voltage Loop
OFF
R4
Input From
Q
Vout
for a
10
From the above equation, D
The objective of the current loop is to regulate the
average inductor current such that it is proportional to
the off duty cycle D
V
objective.
Figure 12
The PWM is performed by the intersection of a ramp
signal with the averaged inductor current at pin 5
(ICOMP). The PWM cycle starts with the Gate turn off
for a duration of T
kept discharged. The ramp is then allowed to rise after
T
ends at the intersection of the ramp signal and the
averaged current waveform. This results in the
proportional relationship between the average current
and the off duty cycle D
Figure 13 shows the timing diagrams of T
PWM waveforms.
Figure 13
3.6.4
The nonlinear gain block controls the amplitude of the
regulated inductor current. The input of this block is the
GATE
drive
OFFMIN
IN
V
V
PWM
. Figure 12 shows the scheme to achieve the
(1)
CREF
RAMP
V
CREF
(1)
expires. The off time of the boost transistor
Nonlinear Gain Block
is a function of V
ramp profile
Average Current Control in CCM
Ramp and PWM waveforms
2.5% of T
OFFMIN
OFF
Functional Description
, and thus to the input voltage
OFF
T
(250ns typ.) and the ramp is
OFFMIN
.
ICOMP
OFF
is proportional to V
PWM cycle
ave(I
released
ramp
ICE2PCS01/G
09 October 2007
IN
) at ICOMP
CCM-PFC
OFFMIN
and the
t
t
IN
.