ICE1PCS01 Infineon Technologies, ICE1PCS01 Datasheet - Page 9

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ICE1PCS01

Manufacturer Part Number
ICE1PCS01
Description
IC PFC CONTROLLER CCM 8DIP
Manufacturer
Infineon Technologies
Datasheet

Specifications of ICE1PCS01

Mode
Continuous Conduction (CCM)
Frequency - Switching
133kHz
Current - Startup
100µA
Voltage - Supply
10.2 V ~ 21 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Through Hole
Package / Case
8-DIP
Start-up Supply Current
100uA
Switching Freq
56 to 250KHz
Operating Supply Voltage (min)
11V
Operating Supply Voltage (max)
21V
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Package Type
PDIP
Pin Count
8
Mounting
Through Hole
Switching Frequency
40 KHz to 320 KHz
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ICE1PCS01X
ICE1PCS01XK
SP000014681

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Figure 9
3.4.4
Whenever VSENSE voltage falls below 0.8V, or
equivalently V
indicates an open loop condition (i.e. VSENSE pin not
connected) or an insufficient input voltage V
normal operation. In this case, most of the blocks within
the IC will be shutdown. It is implemented using
comparator C3 with a threshold of 0.8V as shown in the
IC block diagram in Figure 2.
3.4.5
In the event of main interrupt or brown-out condition,
the PFC system is not able to deliver the rated output
power. This will cause the output voltage V
below its rated value. The IC provides an output under
voltage detection that checks if V
50% of its rated value. Comparator C4 as shown in the
device block diagram (Figure 2) senses the voltage at
pin 6 (VSENSE) with a reference of 2.5V. If comparator
C4 trips, the IC will be shut down as in OLP. The IC will
be ready to restart if there is sufficient V
out of OLP.
3.4.6
Whenever V
over-voltage protection OVP is active as shown in
Figure 7. This is implemented by sensing the voltage at
pin VSENSE with respect to a reference voltage of
5.25V. A VSENSE voltage higher than 5.25V will
immediately reduce the output duty cycle, bypassing
the normal voltage loop control. This results in a lower
input power to reduce the output voltage V
3.5
The switching frequency of the PFC converter can be
set with an external resistor R5 at FREQ pin. The pin
voltage V
capacitor for the oscillator is integrated in the device
and the R5/frequency relationship is given at the
Version 1.2
Full-wave
Rectifier
I
R1
INDUCTOR
ISENSE
R2
Frequency Setting
FREQ
Open Loop Protection / Input Under
Voltage Protect (OLP)
Output Under Voltage Detection (OUV)
Over-Voltage Protection (OVP)
Peak Current Limit (PCL)
OUT
OUT
ICE1PCS01/G
is typically 2.5V. The corresponding
exceeds the rated value by 5%, the
Current Limit
falls below 16% of its rated value, it
1.43x
1.5V
OP1
C2
OUT
Deglitcher
is falling below
300ns
IN
OUT
to pull V
OUT
.
Turn Off
to drop
Driver
IN
OUT
for
9
“Electrical
recommended operating frequency range is from
50kHz to 250kHz. As an example, a R5 of 33kΩ at pin
FREQ will set a switching frequency F
typically.
3.6
3.6.1
The complete system current loop is shown in Figure
10.
Figure 10
It consists of the current loop block which averages the
voltage at pin ISENSE, resulted from the inductor
current flowing across R1. The averaged waveform is
compared with an internal ramp in the ramp generator
and PWM block. Once the ramp crosses the average
waveform, the comparator C1 turns on the driver stage
through the PWM logic block. The Nonlinear Gain block
defines the amplitude of the inductor current. The
following sections describe the functionality of each
individual blocks.
3.6.2
The compensation of the current loop is done at the
ICOMP pin. This is the OTA2 output and a capacitor C3
has to be installed at this node to ground (see Figure
10). Under normal mode of operation, this pin gives a
voltage which is proportional to the averaged inductor
current. This pin is internally shorted to 5V in the event
of IC shuts down when OLP and UVLO occur.
3.6.3
The IC employs an average current control scheme in
continuous conduction mode (CCM) to achieve the
power factor correction.
C3
ISENSE
ICOMP
R2
Full-wave
Average Current Control
Complete Current Loop
Current Loop Compensation
Pulse Width Modulation (PWM)
Retifier
ICE1PCS01/G
From
Complete System Current Loop
R1
Current Loop
1.1mS
+/-50uA (linear range)
Characteristic”
Compensation
Current Loop
Fault
S2
OTA2
L1
4V
Functional Description
R7
Inductor current
proportional to
Comparator
averaged
voltage
ICE1PCS01/G
PWM
D1
Nonlinear
C1
Gain
section.
CCM-PFC
06 Feb 2007
C2
SW
GATE
Driver
Gate
of 133kHz
PWM Logic
R
S
R3
Voltage Loop
R4
Input From
Q
Vout
The

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