# SG6905SZ Fairchild Semiconductor, SG6905SZ Datasheet - Page 17

#### SG6905SZ

Manufacturer Part Number

SG6905SZ

Description

IC PWM CTLR PFC/FLYBACK 20-SOP

Manufacturer

Fairchild Semiconductor

Datasheet

1.SG6905SZ.pdf
(20 pages)

#### Specifications of SG6905SZ

Mode

Average Current

Frequency - Switching

65kHz

Current - Startup

10µA

Voltage - Supply

16 V ~ 20 V

Operating Temperature

-40°C ~ 105°C

Mounting Type

Surface Mount

Package / Case

20-SOIC (7.5mm Width)

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

© 2007 Fairchild Semiconductor Corporation

SG6905 • Rev. 1.1.2

Interleave Switching

The SG6905 uses interleaved switching to synchronize

the PFC and flyback stages. This reduces switching

noise and spreads the EMI emissions. Figure 26 shows

that an off-time t

the PFC gate drive and the turn-on of the PWM.

PFC Operation

The purpose of a boost active Power Factor Corrector

(PFC) is to shape the input current of a power supply.

The input-current waveform and phase follows that of

the input voltage. Using SG6905, average-current-

mode control is utilized for continuous-current-mode

operation for the PFC booster. With the innovative

multi-vector control for voltage loop and switching

charge multiplier/divider for current reference, excellent

input power factor is achieved with good noise

immunity and transient response. Figure 27 shows the

total control loop for the average-current-mode control

circuit of SG6905.

The current source output from the switching charge

multiplier/divider can be expressed as:

Refer to Figure 27, the current output from IMP pin, I

is the summation of I

identical fixed current sources. They are used to pull

HIGH the operating point of the IMP and IPFC pins

since the voltage across R

to ground. The constant current sources I

are typically 60µA.

Through the differential amplification of the signal

across R

output of IEA is compared with an internal sawtooth

and hence the pulse width for PFC is determined.

Through the average current-mode control loop, the

input current I

There are different concerns in determining the value of

the sense resistor R

to reduce power consumption, but it should be large

enough

transformer (CT) may be used to improve the efficiency

of high power converters.

I

I

MO

MO

=

•

Figure 26. Line-Voltage Detection Circuit

R

K

2

•

=

S

I

to

AC

, better noise immunity is achieved. The

V

I

S

RMS

•

•

S

V

maintain

R

is proportional to I

EA

2

S

OFF

μ (

S

is inserted between the turn-off of

A)

The value of R

MO

the

S

and I

goes negative with respect

resolution.

MR1

MO

. I

.

S

MR1

should be small

and I

MR1

A

and I

MR2

current

are

(3)

MR2

(4)

MP

,

There are two major concerns when compensating the

voltage-loop

transient response. Optimizing interaction between

stability and transient response requires that the error

amplifier’s open-loop crossover frequency be half that

of the line frequency, or 23Hz for a 47Hz line (lowest

anticipated international power frequency). The gain vs.

input voltage of the SG6905’s voltage error amplifier

(V

under

transconductance of the error amplifier is at a local

minimum. Rapid perturbation in line or load conditions

causes the input to the voltage error amplifier (V

deviate from its 3V (nominal) value. If this happens, the

transconductance

increases significantly. This raises the gain-bandwidth

product of the voltage loop, resulting in a much more

rapid voltage loop response to such perturbations than

would

characteristics.

The voltage loop gain(s) is given by:

where:

Z

GM

P

V

C

The average total input power can be expressed as:

From equation 6, V

amplifier, actually controls the total input power and

hence the power delivered to the load.

P

∝

∝

=

≈

17

C

IN

2OUTDC

DC

IN

EAO

Δ

Δ

:

V

Figure 27. Average Current Mode Control Loop

:

V

V

V

V

OUTDC

V

2

:

=

:

RMS

RMS

OUT

EAO

) has a specially shaped non-linearity, so that

V

•

: PFC boost output voltage

•

IN

×

×

Δ

Δ

Compensation network for the voltage loop.

Transconductance of VEAO.

Average PFC input power.

(typical designed value is 380V).

PFC boost output capacitor.

P

Δ

(rms)

steady-state

occur

V

V

I

IN

V

R

MO

V

OUT

EAO

FB

•

AC

IN

V

3

∝

•

•

RMS

error

S

×

×

Δ

Δ

V

V

•

V

I

V

RMS

2

C

IN

EAO

FB

with

EA

DC

(rms)

of

EA

•

×

=

amplifier

GM

, the output of the voltage error

I

AC

the

V

2

V

operating

conventional

RMS

×

•

×

Z

V

C

R

2

V

EA

voltage

EA

AC

(V

EAO

):

conditions

error

stability

linear

www.fairchildsemi.com

amplifier

FB

gain

and

) to

(5)

(6)

the