IC PFC CONTROLLER DCM16SOIC

TEA1750T/N1,518

Manufacturer Part NumberTEA1750T/N1,518
DescriptionIC PFC CONTROLLER DCM16SOIC
ManufacturerNXP Semiconductors
SeriesGreenChip™ III
TEA1750T/N1,518 datasheet
 


Specifications of TEA1750T/N1,518

ModeDiscontinuous Conduction (DCM)Frequency - Switching125kHz
Current - Startup60µAVoltage - Supply14 V ~ 22 V
Operating Temperature-40°C ~ 150°CMounting TypeSurface Mount
Package / Case16-SOIC (3.9mm Width)Lead Free Status / RoHS StatusLead free / RoHS Compliant
Other names935282967518
TEA1750T-T
TEA1750T-T
  
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TEA1750
GreenChip III SMPS control IC
Rev. 02 — 15 December 2008
1. General description
The GreenChip III is the third generation of green Switched Mode Power Supply (SMPS)
controller ICs. The TEA1750 combines a controller for Power Factor Correction (PFC) and
a flyback controller. Its high level of integration allows the design of a cost-effective power
supply with a very low number of external components.
The special built-in green functions provide high efficiency at all power levels. This applies
to quasi-resonant operation at high power levels, quasi-resonant operation with valley
skipping, as well as to reduced frequency operation at lower power levels. At low power
levels, the PFC switches over to burst mode control to maintain high efficiency. In burst
mode, soft-start and soft-stop functions are added to eliminate audible noise.
During low power conditions, the flyback controller switches to frequency reduction mode
and limits the peak current to 25 % of its maximum value. This will ensure high efficiency
at low power and good standby power performance while minimizing audible noise from
the transformer.
The proprietary high voltage BCD800 process makes direct start-up possible from the
rectified universal mains voltage in an effective and green way. A second low voltage
Silicon On Insulator (SOI) IC is used for accurate, high speed protection functions and
control.
The TEA1750 enables highly efficient and reliable supplies with power requirements up to
250 W, to be designed easily and with the minimum number of external components.
2. Features
2.1 Distinctive features
I
Integrated PFC and flyback controller
I
Universal mains supply operation (70 V AC to 276 V AC)
I
High level of integration, resulting in a very low external component count and a
cost-effective design
2.2 Green features
I
On-chip start-up current source
2.3 PFC green features
I
Valley/zero voltage switching for minimum switching losses (patented)
I
Frequency limitation to reduce switching losses
I
Burst mode operation if a low load is detected at the flyback output (patented)
Product data sheet

TEA1750T/N1,518 Summary of contents

  • Page 1

    TEA1750 GreenChip III SMPS control IC Rev. 02 — 15 December 2008 1. General description The GreenChip III is the third generation of green Switched Mode Power Supply (SMPS) controller ICs. The TEA1750 combines a controller for Power Factor Correction ...

  • Page 2

    ... NXP Semiconductors 2.4 Flyback green features I Valley switching for minimum switching losses (patented) I Frequency reduction with fixed minimum peak current at low power operation to maintain high efficiency at low output power levels 2.5 Protection features I Safe restart mode for system fault conditions I Continuous mode protection by means of demagnetization detection for both ...

  • Page 3

    ... NXP Semiconductors 5. Block diagram 1.12 V 3.5 V LOW VIN 7 VINSENSE LATCH RESET 6 PFCCOMP 9 2.50 V VOSENSE 2.7 V VoOVP VoBURST HIGH VoBURST LOW VoSTART FB VoSHORT OCP BLANK 500 mV 11 PFCSENSE 60 A SOFT START SOFT STOP VALLEY DETECT 8 PFCAUX Fig 1. Block diagram TEA1750_2 Product data sheet ...

  • Page 4

    ... NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 2. 6.2 Pin description Table 2. Symbol V CC GND FBCTRL FBAUX LATCH PFCCOMP VINSENSE PFCAUX VOSENSE FBSENSE PFCSENSE PFCDRIVER FBDRIVER HVS HV TEA1750_2 Product data sheet 1 VCC GND 2 FBCTRL 3 4 FBAUX TEA1750T LATCH 5 PFCCOMP 6 VINSENSE 7 8 PFCAUX Pin confi ...

  • Page 5

    ... NXP Semiconductors 7. Functional description 7.1 General control The TEA1750 contains a controller for a power factor correction circuit as well as a controller for a flyback circuit. A typical configuration is shown in Fig 3. 7.1.1 Start-up and undervoltage lock-out Initially the capacitor on the V As long pin is shorted to ground. For a short start-up time the charge current above V ...

  • Page 6

    ... NXP Semiconductors When the PFC is started, there is initially no supply take-over from the auxiliary winding. To make a small V as long as the flyback converter has not yet started. Regulation is done by hysteretic control with a limited (high level) charge current. The hysteresis is typically 300 mV. If during start-up the LATCH pin does not reach the V ...

  • Page 7

    ... NXP Semiconductors VINSENSE PROTECTION PFCSENSE PFCDRIVER FBSENSE FBDRIVER FBCTRL VOSENSE Fig 4. 7.1.2 Supply management All internal reference voltages are derived from a temperature compensated and trimmed on-chip band gap circuit. Internal reference currents are derived from a temperature compensated and trimmed on-chip current reference circuit. ...

  • Page 8

    ... NXP Semiconductors 7.1.4 Fast latch reset In a typical application, the mains can be interrupted briefly to reset the latched protection. The PFC bus capacitor, C reset. Typically the PFC bus capacitor, C level. When the latched protection is set, the clamping circuit of the VINSENSE circuit is disabled (see also 750 mV (typ) and then is raised to 870 mV (typ), the latched protection is reset ...

  • Page 9

    ... NXP Semiconductors For applications with high transformer ringing frequencies (after the secondary stroke), the PFCAUX pin should be connected via a capacitor and a resistor to the auxiliary winding. A diode must than be placed from the ground connection to the PFCAUX pin. 7.2.3 Frequency limitation To optimize the transformer and minimize switching losses, the switching frequency is limited to f limit, the system switches over to discontinuous conduction mode ...

  • Page 10

    ... NXP Semiconductors Fig 5. 7.2.6 Burst mode control When the output power of the flyback converter (see converter switches over to frequency reduction mode. When frequency reduction mode is entered by the flyback controller, the power factor correction circuit switches to burst mode control. In burst mode control, switching of the power factor correction circuit is inhibited until the ...

  • Page 11

    ... NXP Semiconductors Fig 6. 7.2.7 Overcurrent protection (PFCSENSE pin) The maximum peak current is limited cycle-by-cycle by sensing the voltage across an external sense resistor (R measured via the PFCSENSE pin. 7.2.8 Mains undervoltage lock-out / brownout protection (VINSENSE pin) To prevent the PFC from operating at very low mains input voltages, the voltage on the VINSENSE pin is sensed continuously ...

  • Page 12

    ... NXP Semiconductors 7.2.11 Driver (pin PFCDRIVER) The driver circuit to the gate of the power MOSFET has a current sourcing capability of typically 500 mA and a current sink capability of typically 1.2 A. This permits fast turn-on and turn-off of the power MOSFET for efficient operation. 7.3 Flyback controller The TEA1750 includes a controller for a fl ...

  • Page 13

    ... NXP Semiconductors In frequency reduction mode the PFC controller is switched to burst mode operation and the flyback maximum frequency changes linearly with the control voltage on the FBCTRL pin (see has (typ) hysteresis load operation the switching frequency of the flyback can be reduced to (almost) zero. ...

  • Page 14

    ... NXP Semiconductors (1) Start of new cycle at lowest drain voltage. (2) Start of new cycle in a classical Pulse Width Modulation (PWM) system without valley detection. Fig 9. 7.3.3 Current mode control (FBSENSE pin) Current mode control is used for the flyback converter for its good line regulation. ...

  • Page 15

    ... NXP Semiconductors Fig 10. Frequency control of flyback part The driver output is latched in the logic, preventing multiple switch-on. 7.3.4 Demagnetization (FBAUX pin) The system is always in quasi-resonant or discontinuous conduction mode. The internal oscillator does not start a new primary stroke until the previous secondary stroke has ended ...

  • Page 16

    ... NXP Semiconductors a. Circuit diagram b. Timing diagram Fig 11. Time-out protection 7.3.6 Soft start-up (pin FBSENSE) To prevent audible transformer noise during start-up, the transformer peak current, I slowly increased by the soft start function. This can be achieved by inserting a resistor and a capacitor between pin FBSENSE and the current sense resistor. ...

  • Page 17

    ... NXP Semiconductors Fig 12. Soft start-up of flyback 7.3.7 Maximum on-time The flyback controller limits the ‘on-time’ of the external MOSFET (typ). When the ‘on-time’ is longer than 25 s, the IC stops switching and enters the safe restart mode. 7.3.8 Overvoltage protection (FBAUX pin) An output overvoltage protection is implemented in the GreenChip III series. This works for the TEA1750 by sensing the auxiliary voltage via the current fl ...

  • Page 18

    ... NXP Semiconductors 7.3.9 Overcurrent protection (FBSENSE pin) The primary peak current in the transformer is measured accurately cycle-by-cycle using the external sense resistor internal level (see also leading edge blanking period, t Fig 13. OCP leading edge blanking 7.3.10 Driver (pin FBDRIVER) The driver circuit to the gate of the external power MOSFET has a current sourcing capability of typically 500 mA and a current sink capability of typically 1.2 A. This permits fast turn-on and turn-off of the power MOSFET for effi ...

  • Page 19

    ... NXP Semiconductors Table 3. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol General P tot T stg T j ESD V ESD [1] Equivalent to discharging a 100 pF capacitor through a 1.5 k series resistor. [2] Equivalent to discharging a 200 pF capacitor through a 0.75 H coil and Thermal characteristics Table 4. Thermal characteristics ...

  • Page 20

    ... NXP Semiconductors Table 5. Characteristics …continued all voltages are measured with respect to ground (pin 2); currents are positive when flowing into amb CC the IC; unless otherwise specified. Symbol Parameter I low charging current ch(low) I high charging current ch(high) I operating supply current CC(oper) Input voltage sensing PFC (pin VINSENSE) ...

  • Page 21

    ... NXP Semiconductors Table 5. Characteristics …continued all voltages are measured with respect to ground (pin 2); currents are positive when flowing into amb CC the IC; unless otherwise specified. Symbol Parameter Output voltage sensing PFC (pin VOSENSE) V open-loop threshold voltage th(ol)(VOSENSE) on pin VOSENSE V flyback start voltage ...

  • Page 22

    ... NXP Semiconductors Table 5. Characteristics …continued all voltages are measured with respect to ground (pin 2); currents are positive when flowing into amb CC the IC; unless otherwise specified. Symbol Parameter Demagnetization management PFC (pin PFCAUX) V comparator threshold voltage th(comp)PFCAUX on pin PFCAUX t PFC demagnetization time-out ...

  • Page 23

    ... NXP Semiconductors Table 5. Characteristics …continued all voltages are measured with respect to ground (pin 2); currents are positive when flowing into amb CC the IC; unless otherwise specified. Symbol Parameter Peak current control flyback (pin FBCTRL) V voltage on pin FBCTRL FBCTRL V time-out voltage on pin to(FBCTRL) ...

  • Page 24

    ... NXP Semiconductors Table 5. Characteristics …continued all voltages are measured with respect to ground (pin 2); currents are positive when flowing into amb CC the IC; unless otherwise specified. Symbol Parameter Temperature protection T IC protection level pl(IC) temperature T hysteresis of IC protection pl(IC)hys level temperature [1] For a typical application with a compensation network on pin PFCCOMP, like the example in ...

  • Page 25

    ... NXP Semiconductors COMPENSATION Fig 14. Typical application diagram of TEA1750 TEA1750_2 Product data sheet SS1 R SS1 R SENSE1 R AUX1 TEA1750T LOOP C TIMEOUT Rev. 02 — 15 December 2008 TEA1750 GreenChip III SMPS control IC C bus OUT SS2 10 C SS2 R SENSE2 R AUX2 VCC 014aaa021 © NXP B.V. 2008. All rights reserved. ...

  • Page 26

    ... NXP Semiconductors 12. Package outline SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

  • Page 27

    ... NXP Semiconductors 13. Revision history Table 6. Revision history Document ID Release date TEA1750_2 20081215 Modifications: Value for T TEA1750_1 20070406 TEA1750_2 Product data sheet Data sheet status Product data sheet in Table 3 has been updated j Product data sheet Rev. 02 — 15 December 2008 TEA1750 GreenChip III SMPS control IC ...

  • Page 28

    ... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

  • Page 29

    ... NXP Semiconductors 16. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2.1 Distinctive features . . . . . . . . . . . . . . . . . . . . . . 1 2.2 Green features . . . . . . . . . . . . . . . . . . . . . . . . . 1 2.3 PFC green features . . . . . . . . . . . . . . . . . . . . . 1 2.4 Flyback green features . . . . . . . . . . . . . . . . . . . 2 2.5 Protection features . . . . . . . . . . . . . . . . . . . . . . 2 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Functional description . . . . . . . . . . . . . . . . . . . 5 7 ...