LM2642MTC/NOPB

Manufacturer Part NumberLM2642MTC/NOPB
DescriptionIC CTRLR SW SYNC STPDN 28TSSOP
ManufacturerNational Semiconductor
LM2642MTC/NOPB datasheet
 


Specifications of LM2642MTC/NOPB

ApplicationsEmbedded systems, Console/Set-Top boxesCurrent - Supply1mA
Voltage - Supply4.5 V ~ 30 VOperating Temperature-40°C ~ 125°C
Mounting TypeSurface MountPackage / Case28-TSSOP
Dc To Dc Converter TypeSynchronous Step Down ControllerNumber Of Outputs2
Pin Count28Input Voltage4.5 to 30V
Output Voltage1.3 to 30VOutput Current20A
Package TypeTSSOPMountingSurface Mount
Operating Temperature ClassificationAutomotiveOperating Temperature (min)-40C
Operating Temperature (max)125CPrimary Input Voltage30V
No. Of Outputs1No. Of Pins28
Operating Temperature Range-40°C To +125°CMslMSL 3 - 168 Hours
Control ModeCurrentRohs CompliantYes
For Use WithLM2642REVD EVAL - BOARD EVALUATION LM2642Lead Free Status / RoHS StatusLead free / RoHS Compliant
Other names*LM2642MTC
*LM2642MTC/NOPB
LM2642MTC
  
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LM2642
Two-Phase Synchronous Step-Down Switching
Controller
General Description
The LM2642 consists of two current mode synchronous
buck regulator controllers with a switching frequency of
300kHz.
The two switching regulator controllers operate 180˚ out of
phase. This feature reduces the input ripple RMS current,
thereby significantly reducing the required input capacitance.
The two switching regulator outputs can also be paralleled to
operate as a dual-phase single output regulator.
The output of each channel can be independently adjusted
• maximum duty cycle. An internal 5V rail is
from 1.3 to V
IN
also available externally for driving bootstrap circuitry.
Current-mode feedback control assures excellent line and
load regulation and a wide loop bandwidth for excellent
response to fast load transients. Current is sensed across
either the Vds of the top FET or across an external current-
sense resistor connected in series with the drain of the top
FET. Current limit is independently adjustable for each chan-
nel.
The LM2642 features analog soft-start circuitry that is inde-
pendent of the output load and output capacitance. This
makes the soft-start behavior more predictable and control-
lable than traditional soft-start circuits.
A PGOOD1 pin is provided to monitor the dc output of
channel 1. Over-voltage protection is available for both out-
puts. A UV-Delay pin is also available to allow delayed shut
off time for the IC during an output under-voltage event.
Block Diagram
© 2006 National Semiconductor Corporation
Features
n Two synchronous buck regulators
n 180˚ out of phase operation
n 4.5V to 30V input range
n Power good function monitors Ch.1
n 37µA Shutdown current
n 0.04% (typical) line and load regulation error
n Current mode control with or without a sense resistor
n Independent enable/soft-start pins allow simple
sequential startup configuration.
n Configurable for single output parallel operation. (See
Figure 2).
n Adjustable cycle-by-cycle current limit
n Input under-voltage lockout
n Output over-voltage latch protection
n Output under-voltage protection with delay
n Thermal shutdown
n Self discharge of output capacitors when the regulator is
OFF
n TSSOP package
Applications
n Embedded computer systems
n High end gaming systems
n Set-top boxes
n WebPAD
DS200462
February 2006
20046201
www.national.com

LM2642MTC/NOPB Summary of contents

  • Page 1

    ... Over-voltage protection is available for both out- puts. A UV-Delay pin is also available to allow delayed shut off time for the IC during an output under-voltage event. Block Diagram © 2006 National Semiconductor Corporation Features n Two synchronous buck regulators n 180˚ out of phase operation n 4.5V to 30V input range n Power good function monitors Ch.1 n 37µ ...

  • Page 2

    Connection Diagram Pin Descriptions KS1 (Pin 1): The positive (+) Kelvin sense for the internal current sense amplifier of Channel 1. Use a separate trace to connect this pin to the current sense point. It should be connected to VIN ...

  • Page 3

    Pin Descriptions (Continued) SW2 (Pin 16): Switch-node connection for Channel 2, which is connected to the source of the top MOSFET of Channel 2. It serves as the negative supply rail for the top-side gate driver, HDRV2. HDRV2 (Pin 17): ...

  • Page 4

    ... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Voltages from the indicated pins to SGND/PGND: VIN, ILIM1, ILIM2, KS1, KS2 SW1, SW2, RSNS1, RSNS2 FB1, FB2, VDD1, VDD2 PGOOD, COMP1, COMP2, UV ...

  • Page 5

    Electrical Characteristics Unless otherwise specified 15V, GND = PGND = 0V, VLIN5 = VDD1 = VDD2. Limits appearing in boldface type apply IN over the specified operating junction temperature range, (-20˚C to +125˚C, if not otherwise specified). Specifications ...

  • Page 6

    ... Note 4: For detailed information on soldering plastic small-outline packages, refer to the Packaging Databook available from National Semiconductor Corporation. Note 5: For testing purposes, ESD was applied using the human-body model, a 100pF capacitor discharged through a 1.5kΩ resistor. ...

  • Page 7

    FIGURE 1. Typical 2 Channel Application Circuit 7 20046203 www.national.com ...

  • Page 8

    FIGURE 2. Typical Single Channel Application Circuit www.national.com 8 20046204 ...

  • Page 9

    9 www.national.com ...

  • Page 10

    Typical Performance Characteristics Softstart Waveforms ( LOAD1 LOAD2 UVP Startup Waveforms Shutdown Waveforms ( LOAD1 LOAD2 www.national.com = 0A) 20046223 20046268 = 0A) 20046222 10 Power On and PGOOD1 Waveforms ( 0A) LOAD1 ...

  • Page 11

    Typical Performance Characteristics Ch.2 Load Transient Response 3.3V , 12V OUT IN Input Supply Current vs Temperature (Shutdown Mode V IN VLIN5 vs Temperature (Continued) 20046229 = 15V) 20046224 20046226 11 Load Transient Response Parallel Operation 1.8V , 12V OUT ...

  • Page 12

    Typical Performance Characteristics FB Reference Voltage vs Temperature Error Amplifier Gain vs Temperature Efficiency vs Load Current Ch.2 = 2.5V, Ch.1 = Off www.national.com (Continued) Operating Frequency vs Temperature 20046266 Efficiency vs Load Current Ch.1 = 5V, Ch.2 = Off ...

  • Page 13

    Operation Descriptions SOFT START The ON/SS1 pin has dual functionality as both channel enable and soft start control. The soft start block diagram is shown in Figure 3. The LM2642 will remain in shutdown mode while both soft start pins ...

  • Page 14

    Operation Descriptions typical) both channels will latch off. Also, UV_DELAY will be disabled and the UV_DELAY pin will return to 0V. During UVP, both the high side and low side FET drivers will be turned off capacitor is ...

  • Page 15

    Operation Descriptions where Imax is the maximum expected load current, including overload multiplier (ie:120%), and Irip is the inductor ripple current (See equation 7). The above equation gives the maximum allowable value for Rsns. Switching losses will increase with Rsns, ...

  • Page 16

    Component Selection Where 200nA is the maximum current drawn by FBx pin. FIGURE 8. Output Voltage Setting Example: Vnom=5V, Vfb=1.238V, Ifbmax=200nA. Choose 60K The output voltage is limited by the maximum duty cycle as well as the minimum on time. ...

  • Page 17

    Output Capacitor Selection (Continued) Notice it is already assumed the total ESR, Re greater than Re_max, otherwise the term under the square root will be a negative value. Also assumed that L has already been selected, ...

  • Page 18

    Input Capacitor Selection Where, again, I1 and I2 are the maximum load currents of channel 1 and 2, and D1 and D2 are the duty cycles. This equation should be used when both duty cycles are ex- pected to be ...

  • Page 19

    Loop Compensation (Continued) FIGURE 10. Control-Output Transfer Function As shown in Figure 10, the control-output transfer function consists of one pole (fp), one zero (fz), and a double pole at fn (half the switching frequency). The following can be done ...

  • Page 20

    Loop Compensation A second zero can also be added with a resistor in series with Cc2. If used, this zero should be placed at fn, where the control to output gain rolls off at -40dB/dec. Generally, fn will be well ...

  • Page 21

    ... BANNED SUBSTANCE COMPLIANCE National Semiconductor manufactures products and uses packing materials that meet the provisions of the Customer Products Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain no ‘‘Banned Substances’’ as defined in CSP-9-111S2. ...