LM2642MTC/NOPB National Semiconductor, LM2642MTC/NOPB Datasheet - Page 18

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LM2642MTC/NOPB

Manufacturer Part Number
LM2642MTC/NOPB
Description
IC CTRLR SW SYNC STPDN 28TSSOP
Manufacturer
National Semiconductor
Datasheet

Specifications of LM2642MTC/NOPB

Applications
Embedded systems, Console/Set-Top boxes
Current - Supply
1mA
Voltage - Supply
4.5 V ~ 30 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
28-TSSOP
Dc To Dc Converter Type
Synchronous Step Down Controller
Number Of Outputs
2
Pin Count
28
Input Voltage
4.5 to 30V
Output Voltage
1.3 to 30V
Output Current
20A
Package Type
TSSOP
Mounting
Surface Mount
Operating Temperature Classification
Automotive
Operating Temperature (min)
-40C
Operating Temperature (max)
125C
Primary Input Voltage
30V
No. Of Outputs
1
No. Of Pins
28
Operating Temperature Range
-40°C To +125°C
Msl
MSL 3 - 168 Hours
Control Mode
Current
Rohs Compliant
Yes
For Use With
LM2642REVD EVAL - BOARD EVALUATION LM2642
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
*LM2642MTC
*LM2642MTC/NOPB
LM2642MTC

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LM2642MTC/NOPB
Manufacturer:
NS/国半
Quantity:
20 000
www.national.com
Input Capacitor Selection
Where, again, I1 and I2 are the maximum load currents of
channel 1 and 2, and D1 and D2 are the duty cycles. This
equation should be used when both duty cycles are ex-
pected to be higher than 50%.
Input capacitors must meet the minimum requirements of
voltage and ripple current capacity. The size of the capacitor
should then be selected based on hold up time require-
ments. Bench testing for individual applications is still the
best way to determine a reliable input capacitor value. The
input capacitor should always be placed as close as possible
to the current sense resistor or the drain of the top FET.
MOSFET Selection
BOTTOM FET SELECTION
During normal operation, the bottom FET is switching on and
off at almost zero voltage. Therefore, only conduction losses
are present in the bottom FET. The most important param-
eter when selecting the bottom FET is the on resistance
(Rdson). The lower the on resistance, the lower the power
loss. The bottom FET power loss peaks at maximum input
voltage and load current. The equation for the maximum
allowed on resistance at room temperature for a given FET
package, is:
where Tj_max is the maximum allowed junction temperature
in the FET, Ta_max is the maximum ambient temperature,
R
and TC is the temperature coefficient of the on resistance
which is typically in the range of 10,000ppm/˚C.
If the calculated Rdson_max is smaller than the lowest value
available, multiple FETs can be used in parallel. This effec-
tively reduces the Imax term in the above equation, thus
reducing Rdson. When using two FETs in parallel, multiply
the calculated Rdson_max by 4 to obtain the Rdson_max for
each FET. In the case of three FETs, multiply by 9.
If the selected FET has an Rds value higher than 35.3Ω,
then two FETs with an Rdson less than 141mΩ (4 x 35.3mΩ)
can be used in parallel. In this case, the temperature rise on
each FET will not go to Tj_max because each FET is now
dissipating only half of the total power.
θja
is the junction-to-ambient thermal resistance of the FET,
(Continued)
18
TOP FET SELECTION
The top FET has two types of losses: switching loss and
conduction loss. The switching losses mainly consist of
crossover loss and bottom diode reverse recovery loss.
Since it is rather difficult to estimate the switching loss, a
general starting point is to allot 60% of the top FET thermal
capacity to switching losses. The best way to precisely de-
termine switching losses is through bench testing. The equa-
tion for calculating the on resistance of the top FET is thus:
Example: Tj_max = 100˚C, Ta_max = 60˚C, Rqja = 60˚C/W,
Vin_min = 5.5V, Vnom = 5V, and Iload_max = 3.6A.
When using FETs in parallel, the same guidelines apply to
the top FET as apply to the bottom FET.
Loop Compensation
The general purpose of loop compensation is to meet static
and dynamic performance requirements while maintaining
stability. Loop gain is what is usually checked to determine
small-signal performance. Loop gain is equal to the product
of control-output transfer function and the output-control
transfer function (the compensation network transfer func-
tion). Generally speaking it is a good idea to have a loop gain
slope that is -20dB /decade from a very low frequency to well
beyond the crossover frequency. The crossover frequency
should not exceed one-fifth of the switching frequency, i.e.
60kHz in the case of LM2642. The higher the bandwidth is,
the faster the load transient response speed will potentially
be. However, if the duty cycle saturates during a load tran-
sient, further increasing the small signal bandwidth will not
help. Since the control-output transfer function usually has
very limited low frequency gain, it is a good idea to place a
pole in the compensation at zero frequency, so that the low
frequency gain will be relatively large. A large DC gain
means high DC regulation accuracy (i.e. DC voltage
changes little with load or line variations). The rest of the
compensation scheme depends highly on the shape of the
control-output plot.

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