IC CNTRLR INT TEMP 48TQFN

 

MAX1978ETM+

Manufacturer Part NumberMAX1978ETM+
DescriptionIC CNTRLR INT TEMP 48TQFN
ManufacturerMaxim Integrated Products
MAX1978ETM+ datasheets

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Specifications of MAX1978ETM+

ApplicationsThermoelectric CoolerVoltage - Supply3 V ~ 5.5 V
Operating Temperature-40°C ~ 85°CMounting TypeSurface Mount
Package / Case48-TQFN Exposed PadOutput Voltage Range- 4.3 V to + 4.3 V
Output Current6 AInput Voltage Range3 V to 5.5 V
Input Current30 mAPower Dissipation2105 mW
Operating Temperature Range- 40 C to + 85 CMounting StyleSMD/SMT
Ic Output TypeCurrentSensing Accuracy Range± 1%
Supply Current30mASupply Voltage Range3V To 5.5V
Sensor Case StyleQFNNo. Of Pins48
Filter TerminalsSMDRohs CompliantYes
Temperature Sensing Range-40°C To +85°CLead Free Status / RoHS StatusLead free / RoHS Compliant
Current - Supply-  
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Integrated Temperature
Controllers for Peltier Modules
where:
A = The gain needed to move the 0dB crossover point
up to the desired frequency. In this case, A = -4dB =
0.6.
f
= The desired crossover frequency, 1.5Hz in this
C
example.
C1 is found to be 0.58µF; use 0.47µF.
Next, the second TEC pole must be cancelled by
adding a zero. Canceling the second TEC pole pro-
vides maximum phase margin by adding positive
phase to the circuit. Setting a second zero (fz2) to at
least 1/5 the crossover frequency (1.5Hz/5 = 0.3Hz),
and a pole (fp1) to 5 times the crossover frequency or
higher (5 × 1.5Hz = 7.5Hz) ensures good phase margin,
while allowing for variation in the location of the TEC’s
second pole. Set the zero fz2 to 0.3Hz and calculate R2:
1
=
fz
2
π
×
×
2
C
1
R
2
where fz2 is the second zero.
R2 is calculated to be 1.1MΩ; use 1MΩ.
Now pole fp1 is added at least 5 times the crossover
frequency to terminate zero fz2.
TEC GAIN AND PHASE
40
30
20
10
0
-10
-20
-30
-40
-50
-60
-70
-80
0.001
0.01
0.1
1
FREQUENCY (Hz)
Figure 6. Bode Plot of a Generic TEC Module
18
______________________________________________________________________________________
Choose fp1 = 15Hz, find R1 using the following equation:
Resistor R1 is found to be 22kΩ, use 20kΩ
The final step is to terminate the first zero by setting the
rolloff frequency with a second pole, fp2. A good
choice is 2 times fp1.
Choose fp2 = 30Hz, find C3 using the following equation:
where C3 is found to be 0.05µF, use 0.047µF.
Figure 7 displays the compensated gain and phase
plots for the above example.
The example given is a good place to start when com-
pensating the thermal loop. Different TEC modules
require individual testing to find their optimal compen-
sation scheme. Other compensation schemes can be
used. The above procedure should provide good
results for the majority of optical modules.
90
45
0
-45
-10
-20
-90
-30
-40
-135
-50
-60
-70
-180
-80
10
100
Figure 7. Compensated Thermal-Control Loop Using the TEC
Module in Figure 6
1
=
fp
1
π
×
×
2
C
1
R
1
1
=
fp
2
π
×
×
2
C
3
R
3
COMPENSATED
TEC GAIN AND PHASE
80
90
70
60
45
50
40
30
0
20
10
-45
0
-90
-135
-180
0.001
0.01
0.1
1
10
100
FREQUENCY (Hz)

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