ISL6537CRZR5160 Intersil, ISL6537CRZR5160 Datasheet

ISL6537CRZR5160

Manufacturer Part Number

ISL6537CRZR5160

Description

IC REG/CTRLR ACPI DUAL DDR 28QFN

Manufacturer

Intersil

Datasheet

1.ISL6537CRZ.pdf (15 pages)

Specifications of ISL6537CRZR5160

Applications

Memory, DDR/DDR2 Regulator

Current - Supply

7mA

Operating Temperature

0°C ~ 70°C

Mounting Type

Surface Mount

Package / Case

28-QFN

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Voltage - Supply

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ACPI Regulator/Controller for

Dual Channel DDR Memory Systems

The ISL6537 provides a complete ACPI compliant power

solution for up to 4 DIMM dual channel DDR/DDR2 Memory

systems. Included are both a synchronous buck controller to

supply V

state, a fully integrated sink-source regulator generates an

accurate (V

need for a negative supply. A buffered version of the V

reference is provided as V

integrated for the GMCH core voltage regulation and for the

GMCH and CPU V

The switching PWM controller drives two N-Channel

MOSFETs in a synchronous-rectified buck converter

topology. The synchronous buck converter uses voltage-

mode control with fast transient response. The switching

regulator provides a maximum static regulation tolerance of

user-adjustable by means of external resistors down to 0.8V.

An integrated soft-start feature brings all outputs into

regulation in a controlled manner when returning to S0/S1

state from any sleep state. During S0 the VIDPGD signal

indicates that the GMCH and CPU V

is within spec and operational.

Each output is monitored for undervoltage events. The

switching regulator also has overvoltage and overcurrent

protection. Thermal shutdown is integrated.

Pinout

2% over line, load, and temperature ranges. The output is

DDR_VTT

5VSBY

VDDQ

P12V

GND

S3#

DDQ

during S0/S1 and S3 states. During S0/S1

/2) high current V

ISL6537 (6x6 QFN)

termination voltage regulation.

TOP VIEW

REF

GND

. Two LDO controllers are also

Data Sheet

voltage without the

termination voltage

DRIVE4

REFADJ4

DRIVE3

FB3

FB4

COMP

DDQ

1-888-INTERSIL or 1-888-468-3774

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

Features

• Generates 4 Regulated Voltages

• ACPI Compliant Sleep State Control

• Glitch-free Transitions During State Changes

• Integrated V

• PWM Controller Drives Low Cost N-Channel MOSFETs

• 250kHz Constant Frequency Operation

• Tight Output Voltage Regulation

• Fully-Adjustable Outputs with Wide Voltage Range: Down

• Simple Single-Loop Voltage-Mode PWM Control Design

• Fast PWM Converter Transient Response

• Under and Overvoltage Monitoring on All Outputs

• OCP on the Switching Regulator

• Integrated Thermal Shutdown Protection

• Pb-Free Plus Anneal Available (RoHS Compliant)

Applications

• Single and Dual Channel DDR Memory Power Systems in

• Graphics Cards - GPU and Memory Supplies

• ASIC Power Supplies

• Embedded Processor and I/O Supplies

• DSP Supplies

Ordering Information

*Add “-T” suffix to part number for tape and reel packaging.

NOTE: Intersil Pb-free plus anneal products employ special Pb-free

material sets; molding compounds/die attach materials and 100%

matte tin plate termination finish, which are RoHS compliant and

compatible with both SnPb and Pb-free soldering operations. Intersil

Pb-free products are MSL classified at Pb-free peak reflow

temperatures that meet or exceed the Pb-free requirements of

IPC/JEDEC J STD-020.

ISL6537CR

ISL6537CRZ

(See Note)

NUMBER

- Synchronous Buck PWM Controller for DDR V

- 3A Integrated Sink/Source Linear Regulator with

- LDO Regulator for GMCH Core

- LDO Regulator for CPU/GMCH V

- All Outputs:

to 0.8V supports DDR and DDR2 Specifications

ACPI Compliant PCs

PART

Accurate VDDQ/2 Divider Reference for DDR V

All other trademarks mentioned are the property of their respective owners.

July 18, 2007

Intersil (and design) is a registered trademark of Intersil Americas Inc.

ISL6537CR

ISL6537CRZ

MARKING

REF

PART

2% Over Temperature

Buffer

RANGE (°C)

0 to +70

TEMP.

28 Ld 6x6 QFN L28.6x6

28 Ld 6x6 QFN

(Pb-free)

PACKAGE

Termination

ISL6537

FN9142.6

DDQ

DWG. #

L28.6x6

PKG.

Related parts for ISL6537CRZR5160

ISL6537CRZR5160 Summary of contents

Page 1

... Over Temperature PART TEMP. MARKING RANGE (°C) PACKAGE ISL6537CR 6x6 QFN L28.6x6 ISL6537CRZ 6x6 QFN (Pb-free) | Intersil (and design registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2004, 2005, 2007. All Rights Reserved DDQ TT PKG. DWG. # L28.6x6 ...

Page 2

Block Diagram VDDQ P12V R GU EA4 DRIVE4 GMCH DUAL LDO R GL FB4 REFADJ4 P12V EA3 DRIVE3 FB3 P12V EA2 DRIVE2 FB2 5VSBY P12V S3# S5# FB POR MONITOR AND CONTROL FAULT SOFT-START & ENABLE A SOFT-START & ENABLE ...

Page 3

Simplified Power System Diagram V DDQ SLP_S3 SLP_S5 GMCH + Q5 V TT_GMCH/CPU + Typical Application V DDQ_DDR SLP_S5 SLP_S3 GMCH TT_GMCH/CPU 3 ISL6537 12V 5VSBY SLEEP STATE LOGIC PWM ...

Page 4

... Thermal Information Thermal Resistance QFN Package (Notes Maximum Junction Temperature (Plastic Package +150° 7.0V (DC) Maximum Storage Temperature Range . . . . . . . . . -65°C to +150°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp SYMBOL TEST CONDITIONS I S3# and S5# HIGH, UGATE/LGATE Open CC_S0 I S5# LOW, S3# Don’t Care, UGATE/LGATE ...

Page 5

Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. Refer to Block and Simplified Power System Diagrams and Typical Application Schematics (Continued) PARAMETER PWM CONTROLLER GATE DRIVERS UGATE and LGATE Source UGATE and LGATE Sink VTT REGULATOR Upper Divider Impedance Lower ...

Page 6

Functional Pin Description 5VSBY (Pin 1) 5VSBY is the bias supply of the ISL6537 typically connected to the 5V standby rail of an ATX power supply. During S4/S5 sleep states the ISL6537 enters a reduced power mode and ...

Page 7

BOOT (Pin 25) This pin provides ground referenced bias voltage to the upper MOSFET driver. A bootstrap circuit is used to create a voltage suitable to drive a logic-level N-channel MOSFET. FB2 (Pin 11) Connect the output of the V ...

Page 8

SLP_S3# SLP_S5# 12V POR 12V 0V V DDQ_DDR 0V V DDQ_DDR V TT_DDR 0V V GMCH_UPPER 0V V GMCH 0V V TT_GMCH/CPU 0V VIDPGD (3 SOFTSTART CYCLES Soft-Start Rise Time Dependent ...

Page 9

The digital soft-start for the PWM regulator is accomplished by clamping the error amplifier reference input to a level proportional to the internal digital soft-start voltage. As the soft- start voltage slews up, the PWM comparator generates PHASE pulses of ...

Page 10

Fault Counter reaches a count any other time. The 16384 counts that are required to reset the Fault Reset Counter represent 8 soft-start cycles, as one soft-start cycle is 2048 clock ...

Page 11

Next are the small signal components which connect to sensitive nodes or supply critical bypass current and signal coupling. A multi-layer printed circuit ...

Page 12

DRIVER OSC PWM COMPARATOR - DRIVER ΔV + OSC E REFERENCE ERROR AMP DETAILED COMPENSATION COMPONENTS COMP ISL6537 REFERENCE ⎛ ⎞ ...

Page 13

The output voltage programming resistor will depend on the value chosen for the feedback resistor and the desired output voltage of the particular regulator. × ---------------------------------- - V 0.8V – DDQ × ...

Page 14

Place the small ceramic capacitors physically close to the MOSFETs and between the drain of upper MOSFET and the source of lower MOSFET. The important parameters for the bulk input capacitance are the voltage rating and the RMS ...

Page 15

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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