ISL6537ACR Intersil, ISL6537ACR Datasheet - Page 12

IC REG/CTRLR ACPI DUAL DDR 28QFN

ISL6537ACR

Manufacturer Part Number
ISL6537ACR
Description
IC REG/CTRLR ACPI DUAL DDR 28QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL6537ACR

Applications
Memory, DDR/DDR2 Regulator
Current - Supply
7mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Voltage - Supply
-

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FIGURE 2. PRINTED CIRCUIT BOARD POWER PLANES
12V
KEY
ATX
GND PAD
ISL6537A
VIA CONNECTION TO GROUND PLANE
ISLAND ON POWER PLANE LAYER
ISLAND ON CIRCUIT AND/OR POWER PLANE LAYER
P12V
VDDQ(2)
COMP4
DRIVE2
DRIVE3
5VSBY
PHASE
LGATE
UGATE
AND ISLANDS
PWM4
VTT(2)
COMP
GNDP
FB4
FB2
FB3
FB
C
OUT2
R
R
C
C
C
C
2
6
R
2
6
BP
BP
R
10
5VSBY
12
R
R
12
4
8
R
R
C
C
11
9
1
5
C
C
3
7
R
R
5VDUAL
V
Q
1
Q
5
3.3VATX
TT
R
R
1
2
3
7
C
OUT5
Q
L
C
3
1
C
C
IN
3.3VATX
V
OUT1
OUT3
DDQ
V
Q
DAC
Q
Q
V
C
3
1
TT_GMCH/CPU
2
OUT4
V
DDQ
V
C
GMCH
IN
L
2
ISL6537A
the heat to move away from the IC and also ties the pad to
the ground plane through a low impedance path.
The switching components should be placed close to the
ISL6537A first. Minimize the length of the connections
between the input capacitors, C
by placing them nearby. Position both the ceramic and bulk
input capacitors as close to the upper MOSFET drain as
possible. Position the output inductor and output capacitors
between the upper and lower MOSFETs and the load.
The critical small signal components include any bypass
capacitors, feedback components, and compensation
components. Place the PWM converter compensation
components close to the FB and COMP pins. The feedback
resistors should be located as close as possible to the FB
pin with vias tied straight to the ground plane as required.
Feedback Compensation - PWM Buck Converters
Figure 3 highlights the voltage-mode control loop for a
synchronous-rectified buck converter. The output voltage
(V
amplifier output (V
triangular wave to provide a pulse-width modulated (PWM)
wave with an amplitude of V
PWM wave is smoothed by the output filter (L
ΔV
OUT
FIGURE 3. VOLTAGE-MODE BUCK CONVERTER
OSC
V
) is regulated to the Reference voltage level. The error
DDQ
OSC
COMPARATOR
=
COMPENSATION DESIGN AND OUTPUT
VOLTAGE SELECTION
ERROR
AMP
DETAILED COMPENSATION COMPONENTS
V
0.8
ISL6537A
E/A
PWM
E/A
×
Z
+
-
FB
-
+
COMP
1
) is compared with the oscillator (OSC)
C
+
REFERENCE
2
REFERENCE
R
------ -
R
C
1
4
+
-
1
IN
DRIVER
DRIVER
R
Z
2
at the PHASE node. The
IN
IN
, and the power switches
FB
Z
FB
PHASE
R
(PARASITIC)
V
4
C
IN
3
L
Z
R
O
IN
1
O
R
ESR
C
3
and C
O
V
DDQ
V
FN9143.5
O
DDQ
).

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