SE97TP,147 NXP Semiconductors, SE97TP,147 Datasheet

IC TEMP SENSOR DIMM 8-HWSON

SE97TP,147

Manufacturer Part Number
SE97TP,147
Description
IC TEMP SENSOR DIMM 8-HWSON
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SE97TP,147

Function
Temp Monitoring System (Sensor)
Topology
ADC (Sigma Delta), Comparator, Register Bank
Sensor Type
Internal
Sensing Temperature
-40°C ~ 125°C
Output Type
I²C™/SMBus™
Output Alarm
Yes
Output Fan
Yes
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-WSON (Exposed Pad), 8-HWSON
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-4730-2
935286725147
1. General description
The NXP Semiconductors SE97 measures temperature from −40 °C to +125 °C with
JEDEC Grade B ±1 °C accuracy between +75 °C and +95 °C and also provide 256 bytes
of EEPROM memory communicating via the I
Dual In-line Memory Module (DIMM) measuring the DRAM temperature in accordance
with the new JEDEC (JC-42.4) Mobile Platform Memory Module Temperature Sensor
Component specification and also replacing the Serial Presence Detect (SPD) which is
used to store memory module and vendor information.
The SE97 thermal sensor operates over the V
over the range of 3.0 V to 3.6 V write and 1.7 V to 3.6 V read.
Placing the Temp Sensor (TS) on a DIMM allows accurate monitoring of the DIMM module
temperature to better estimate the DRAM case temperature (T
exceeding the maximum operating temperature of 85 °C. The chip set throttles the
memory traffic based on the actual temperatures instead of the calculated worst-case
temperature or the ambient temperature using a temp sensor mounted on the
motherboard. There is up to 30 % improvement in thin and light notebooks that are using
one or two 1 GB SO-DIMM modules. The TS is required on DDR3 RDIMM and RDIMM
ECC. Future uses of the TS will include more dynamic control over thermal throttling, the
ability to use the Alarm Window to create multiple temperature zones for dynamic
throttling and to save processor time by scaling the memory refresh rate.
The TS consists of a ΔΣ Analog-to-Digital Converter (ADC) that monitors and updates its
own temperature readings 10 times per second, converts the reading to a digital data, and
latches them into the data temperature register. User-programmable registers, the
specification of upper/lower alarm and critical temperature trip points, EVENT output
control, and temperature shutdown, provide flexibility for DIMM temperature-sensing
applications.
When the temperature changes beyond the specified boundary limits, the SE97 outputs
an EVENT signal using an open-drain output that can be pulled up between 0.9 V and
3.6 V. The user has the option of setting the EVENT output signal polarity as either an
active LOW or active HIGH comparator output for thermostat operation, or as a
temperature event interrupt output for microprocessor-based systems. The EVENT output
can even be configured as a critical temperature output.
The EEPROM is designed specifically for DRAM DIMMs SPD. The lower 128 bytes
(address 00h to 7Fh) can be Permanent Write Protected (PWP) or Reversible Write
Protected (RWP) by software. This allows DRAM vendor and product information to be
stored and write protected. The upper 128 bytes (address 80h to FFh) are not write
protected and can be used for general purpose data storage.
SE97
DDR memory module temp sensor with integrated SPD, 3.3 V
Rev. 07 — 29 January 2010
DD
2
C-bus/SMBus. It is typically mounted on a
range of 3.0 V to 3.6 V and the EEPROM
case
) to prevent it from
Product data sheet

Related parts for SE97TP,147

SE97TP,147 Summary of contents

Page 1

... DDR memory module temp sensor with integrated SPD, 3.3 V Rev. 07 — 29 January 2010 1. General description The NXP Semiconductors SE97 measures temperature from −40 °C to +125 °C with JEDEC Grade B ±1 °C accuracy between +75 °C and +95 °C and also provide 256 bytes of EEPROM memory communicating via the I Dual In-line Memory Module (DIMM) measuring the DRAM temperature in accordance with the new JEDEC (JC-42 ...

Page 2

... NXP Semiconductors The SE97 has a single die for both the temp sensor and EEPROM for higher reliability and supports the industry-standard 2-wire I TIMEOUT function is supported to prevent system lock-ups. Manufacturer and Device ID registers provide the ability to confirm the identity of the device. Three address pins allow up to eight devices to be controlled on a single bus ...

Page 3

... NXP Semiconductors 3. Applications DDR2 and DDR3 memory modules Laptops, personal computers and servers Enterprise networking Hard disk drives and other PC peripherals 4. Ordering information Table 1. Ordering information Type number Topside mark SE97PW SE97 SE97TK SE97 [1] SE97TL 97L [1][2][3] SE97TP S97 [1][2][3] SE97TP/S900 ...

Page 4

... NXP Semiconductors 5. Block diagram SE97 TEMPERATURE REGISTER CRITICAL ALARM TRIP UPPER ALARM TRIP LOWER ALARM TRIP CAPABILITY MANUFACTURING ID DEVICE/REV ID SMBus TIMEOUT/ALERT CONFIGURATION • HYSTERESIS • SHUT DOWN TEMP SENSOR • LOCK PROTECTION • EVENT OUTPUT ON/OFF • EVENT OUTPUT POLARITY • EVENT OUTPUT STATUS • ...

Page 5

... NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 2. terminal 1 index area Fig 4. Fig 6. SE97_7 Product data sheet DDR memory module temp sensor with integrated SPD, 3 EVENT SE97PW 3 6 SCL 4 5 SDA 002aab805 Pin configuration for TSSOP8 EVENT SE97TK SCL SDA SS 002aab803 Transparent top view ...

Page 6

... NXP Semiconductors 6.2 Pin description Table 2. Symbol SDA SCL EVENT V DD SE97_7 Product data sheet DDR memory module temp sensor with integrated SPD, 3.3 V Pin description Pin Type Description C-bus/SMBus slave address bit 0 with internal pull-down. This input is overvoltage tolerant to support software write protection. ...

Page 7

... NXP Semiconductors 7. Functional description 7.1 Serial bus interface The SE97 communicates with a host controller by means of the 2-wire serial bus 2 (I C-bus/SMBus) that consists of a serial clock (SCL) and serial data (SDA) signals. The device supports SMBus, I speed is defined to have bus speeds from 100 kHz 400 kHz, and the SMBus is from 10 kHz to 100 kHz ...

Page 8

... NXP Semiconductors 7.3 EVENT output condition The EVENT output indicates conditions such as the temperature crossing a predefined boundary. The EVENT modes are very configurable and selected using the configuration register (CONFIG). The interrupt mode or comparator mode is selected using CONFIG[0], using either TCRIT/UPPER/LOWER or TCRIT only temperature bands (CONFIG[2]) as modified by hysteresis (CONFIG[10:9]) ...

Page 9

... NXP Semiconductors temperature (°C) critical Upper Boundary Alarm Lower Boundary Alarm EVENT in Comparator mode EVENT in Interrupt mode software interrupt clear EVENT in ‘Critical Temp only’ mode Refer to Table 3 for figure note information. Fig 8. EVENT output condition Table 3. EVENT output condition Figure ...

Page 10

... NXP Semiconductors 7.3.2 EVENT thresholds 7.3.2.1 Alarm window The device provides a comparison window with an UPPER trip point and a LOWER trip point, programmed through the Upper Boundary Alarm Trip register (02h), and Lower Boundary Alarm Trip register (03h). The Upper Boundary Alarm Trip register holds the ...

Page 11

... NXP Semiconductors – Competitor devices: Compares the Alarm Window with temperature register at any time, so they get the EVENT output immediately when new T output are set at the same time. – Work-around: Wait at least 125 ms before enabling EVENT output (EOCTL = 1). Intel will change Nehalem BIOS so that T EVENT output is enabled and Event value is checked ...

Page 12

... NXP Semiconductors – Work-around: Always clear the EVENT output before temperature exceeds the critical temperature. – SE97B will keep EVENT asserted after the temperature drops below the critical temperature until a Clear EVENT command de-asserts EVENT. 7.4 Conversion rate The conversion time is the amount of time required for the ADC to complete a temperature measurement for the local temperature sensor ...

Page 13

... NXP Semiconductors feature defaults to being enabled and can be programmed to disable. These registers are required to be initialized before the device can properly function. Except for the SPD, which does not have any programmable registers, and does not need to be initialized. Table 4 registers. ...

Page 14

... NXP Semiconductors START bit S 0 host detects SMBus ALERT Fig 9. How SE97 responds to SMBus ALERT Response Address 7.9 SMBus/I The data registers in this device are selected by the Pointer register. At power-up, the Pointer register is set to ‘00h’, the location for the Capability register. The Pointer register latches the last location to which it was set ...

Page 15

... NXP Semiconductors SCL SDA S START device address and write by host SCL D15 D14 D13 D12 SDA by host most significant byte data A = ACK = Acknowledge bit Write bit = Read bit = 1. 2 Fig 11. SMBus/I C-bus write to the Pointer register followed by a write data word ...

Page 16

... NXP Semiconductors SCL SDA S START device address and read by host SCL D15 D14 D13 D12 SDA returned most significant byte data A = ACK = Acknowledge bit NACK = No Acknowledge bit Write bit = Read bit = 1. 2 Fig 13. SMBus/I C-bus word read from register with a pre-set pointer ...

Page 17

... NXP Semiconductors 7.10 EEPROM operation The 2-kbit EEPROM is organized as either 256 bytes of 8 bits each (byte mode pages of 16 bytes each (page mode). Accessing the EEPROM in byte mode or page mode is automatic; partial page write of 2 bytes, 4 bytes bytes is also supported. Communication with the EEPROM is via the 2-wire serial I provides an overview of the EEPROM partitioning ...

Page 18

... NXP Semiconductors 7.10.1.2 Page Write The SE97 contains 256 bytes of data, arranged in 16 pages of 16 bytes each. The page is selected by the four Most Significant Bits (MSB) of the address byte presented to the device after the slave address, while the four Least Significant Bits (LSB) point to the byte within the page ...

Page 19

... NXP Semiconductors Table 5 Table 5. EEPROM commands summary Command Normal EEPROM read/write Reversible Write Protection (RWP) Clear Reversible Write Protection (CRWP) Permanent Write Protection (PWP) Read RWP Read CRWP Read PWP [1] The most significant bit, bit 7, is sent first. [2] A0, A1, and A2 are compared against the respective external pins on the SE97. ...

Page 20

... NXP Semiconductors slave address (memory) SDA START condition X = Don’t Care (1) Refer to Table 7 regarding the exact state of the acknowledge bit. Fig 18. Software Write Protect (read) 7.10.2.1 Permanent Write Protection (PWP) If the software write-protection has been set with the PWP instruction, the first 128 bytes of the memory are permanently write-protected ...

Page 21

... NXP Semiconductors 7.10.2.3 Read Permanent Write Protection (RPWP), Read Reversible Write Protection (RRWP), and Read Clear Reversible Write Protection (RCRWP) Read PWP, RWP, and CRWP allow the SE97 to be read in write protection mode. The instruction format is the same as that of the write protection except that the 8 set to 1 ...

Page 22

... NXP Semiconductors Fig 20. Selective read timing 7.10.3.3 Sequential read If the master acknowledges the first data byte transmitted by the SE97, then the device will continue transmitting as long as each data byte is acknowledged by the master (Figure will ‘wrap around’ to the beginning of memory, and so on. Sequential Read works with either ‘ ...

Page 23

... NXP Semiconductors 7.11 Hot plugging The SE97 can be used in hot plugging applications. Internal circuitry prevents damaging current backflow through the device when it is powered down, but with the I EVENT or address pins still connected. The open-drain SDA and EVENT pins (SCL and address pins are input only) effectively places the outputs in a high-impedance state during power-up and power-down, which prevents driver conflict and bus contention ...

Page 24

... NXP Semiconductors 8.2 Capability register (00h, 16-bit read-only) Table 9. Capability register (address 00h) bit allocation Bit 15 Symbol Default 0 Access R Bit 7 Symbol RFU Default 0 Access R [1] The SE97 A0 pin can support but the final die was already taped out before the JC42.4 ballot 1435.00 register change could be implemented. Bit 5 is changed from ‘ ...

Page 25

... NXP Semiconductors 8.3 Configuration register (01h, 16-bit read/write) Table 11. Configuration register (address 01h) bit allocation Bit 15 Symbol Default 0 Access R Bit 7 Symbol CTLB AWLB Default 0 Access R/W R/W Table 12. Bit Symbol 15:11 RFU 10:9 HEN SE97_7 Product data sheet DDR memory module temp sensor with integrated SPD, 3.3 V ...

Page 26

... NXP Semiconductors Table 12. Bit Symbol 8 SHMD SE97_7 Product data sheet DDR memory module temp sensor with integrated SPD, 3.3 V Configuration register (address 01h) bit description Description Shutdown Mode. 0 — enabled Temperature Sensor (default) 1 — disabled Temperature Sensor When shut down, the thermal sensor diode and ADC are disabled to save power, no events will be generated ...

Page 27

... NXP Semiconductors Table 12. Bit Symbol 7 CTLB 6 AWLB 5 CEVNT 4 ESTAT 3 EOCTL 2 CVO 1 EP SE97_7 Product data sheet DDR memory module temp sensor with integrated SPD, 3.3 V Configuration register (address 01h) bit description Description Critical Trip Lock bit. 0 — Critical Alarm Trip register is not locked and can be altered (default) 1 — ...

Page 28

... NXP Semiconductors Table 12. Bit Symbol 0 EMD Table 13. Hysteresis enable Action Below Alarm Window bit (bit 13) Temperature Threshold slope temperature sets falling T trip(l) clears rising T trip(l) Above Alarm Window Below Alarm Window Fig 22. Hysteresis: how it works SE97_7 Product data sheet DDR memory module temp sensor with integrated SPD, 3.3 V ...

Page 29

... NXP Semiconductors 8.4 Temperature format The temperature data from the temperature read back register is an 11-bit 2’s complement word with the least significant bit (LSB) equal to 0.125 °C (resolution). A value of 019Ch will represent 25.75 °C • A value of 07C0h will represent 124 °C • ...

Page 30

... NXP Semiconductors 8.5 Temperature Trip Point registers 8.5.1 Upper Boundary Alarm Trip register (16-bit read/write) The value is the upper threshold temperature value for Alarm mode. The data format is 2’s complement with bit 2 = 0.25 °C. ‘RFU’ bits will always report zero. Interrupts will respond to the presently programmed boundary values ...

Page 31

... NXP Semiconductors 8.5.2 Lower Boundary Alarm Trip register (16-bit read/write) The value is the lower threshold temperature value for Alarm mode. The data format is 2’s complement with bit 2 = 0.25 °C. RFU bits will always report zero. Interrupts will respond to the presently programmed boundary values. If boundary values are being altered in-system advised to turn off interrupts until a known state can be obtained to avoid superfluous interrupt activity ...

Page 32

... NXP Semiconductors 8.6 Temperature register (16-bit read-only) Table 21. Bit Symbol Default Access Bit Symbol Default Access Table 22. Bit 11:1 0 SE97_7 Product data sheet DDR memory module temp sensor with integrated SPD, 3.3 V Temperature register bit allocation ACT AAW BAW Temperature register bit description ...

Page 33

... NXP Semiconductors 8.7 Manufacturer’s ID register (16-bit read-only) The SE97 Manufacturer’s ID register is intended to match NXP Semiconductors PCI SIG (1131h). Table 23. Bit Symbol Default Access Bit Symbol Default Access 8.8 Device ID register The SE97 device ID is A2h. The device revision varies by device. ...

Page 34

... NXP Semiconductors 8.9 SMBus register Table 25. Bit Symbol Default Access Bit Symbol Default Access Table 26. Bit 15:8 7 6:1 0 SE97_7 Product data sheet DDR memory module temp sensor with integrated SPD, 3.3 V SMBus Time-out register bit allocation STMOUT R SMBus Time-out register bit description ...

Page 35

... NXP Semiconductors 9. Application design-in information In a typical application, the SE97 behaves as a slave device and interfaces to a bus master (or host) via the SCL and SDA lines. The EVENT output is monitored by the host, and asserts when the temperature reading exceeds the programmed values in the alarm registers ...

Page 36

... NXP Semiconductors 9.1 SE97 in memory module application Figure 25 centered in the memory module to monitor the temperature of the DRAM and also to provide a 2-kbit EEPROM as the Serial Presence Detect (SPD). In the event of overheating, the SE97 triggers the EVENT output and the memory controller throttles the memory bus to slow the DRAM ...

Page 37

... NXP Semiconductors V OL(SDA) V OL(EVENT) I OL(sink)(SDA) I OL(sink)EVENT Calculation example: T amb I DD(AV 3 Maximum V I OL(sink)(SDA) V OL(EVENT) I OL(sink)EVENT R th(j-a) R th(j-a) Self heating due to power dissipation for HVSON8 is: Δ Self heating due to power dissipation for TSSOP8 is: ΔT = 160 10. Limiting values Table 27. In accordance with the Absolute Maximum Rating System (IEC 60134). ...

Page 38

... NXP Semiconductors 11. Characteristics Table 28. SE97 thermal sensor characteristics − 3 3 amb Symbol Parameter T temperature limit accuracy lim(acc) T temperature resolution res T conversion period conv E conversion rate error f(conv) SE97_7 Product data sheet DDR memory module temp sensor with integrated SPD, 3.3 V ° ...

Page 39

... NXP Semiconductors Table 29. DC characteristics − 1 3 amb Symbol Parameter I average supply current DD(AV) I supply voltage shutdown mode sd(VDD) current V HIGH-level input voltage IH V LOW-level input voltage IL V LOW-level output voltage 1 OL1 V LOW-level output voltage 2 OL2 V overvoltage input voltage I(ov) V power-on reset voltage ...

Page 40

... NXP Semiconductors 500 I DD(AV) (μA) 400 V DD 300 200 100 0 − C-bus and EEPROM inactive. Fig 26. Average supply current 600 I DD(AV) (μA) 500 V DD 400 300 200 − Temp sensor and EEPROM active. Fig 28. Average supply current during EEPROM write 8.0 ...

Page 41

... NXP Semiconductors 25 I OL(sink)(SDA) ( − 0.6 V. OL2 Fig 32. SDA output current 140 T conv (ms) 120 100 80 60 − Fig 34. Conversion period 3 (V) 2.8 2.6 2.4 2.2 2.0 − For temp sensor conversion 3 3 Fig 36. Average power-on threshold voltage SE97_7 Product data sheet DDR memory module temp sensor with integrated SPD, 3 ...

Page 42

... NXP Semiconductors 120 thermal response (%) 80 ( From 25 °C (air) to 120 °C (oil bath). (1) TSSOP8 (2) HVSON8, HWSON8, HXSON8 Fig 38. Package thermal response SE97_7 Product data sheet DDR memory module temp sensor with integrated SPD, 3.3 V 002aac905 temp error (° time (s) Fig 39. Temperature error versus power supply noise Rev. 07 — ...

Page 43

... NXP Semiconductors Table 30. SMBus AC characteristics − 1 3 amb The AC specifications fully meet or exceed SMBus 2.0 specifications, but allow the bus to interface with the I to 400 kHz. Symbol Parameter f SCL clock frequency SCL t HIGH period of the SCL clock HIGH t LOW period of the SCL clock ...

Page 44

... NXP Semiconductors [9] The write cycle time is the time elapsed between the STOP command (following the write instruction) and the completion of the internal write cycle. During the internal write cycle, SDA is released by the slave and the device does not acknowledge external commands. ...

Page 45

... NXP Semiconductors 12. Package outline TSSOP8: plastic thin shrink small outline package; 8 leads; body width 4 pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.85 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. ...

Page 46

... NXP Semiconductors HVSON8: plastic thermal enhanced very thin small outline package; no leads; 8 terminals; body 0. terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0 0.2 0.00 0.2 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...

Page 47

... NXP Semiconductors HXSON8: plastic thermal enhanced extremely thin small outline package; no leads; 8 terminals; body 0 terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) UNIT max 0.5 0.04 0.3 mm nom min 0.2 Note 1. Dimension A is including plating thickness. The package footprint is compatible with JEDEC MO229 ...

Page 48

... NXP Semiconductors HWSON8: plastic thermal enhanced very very thin small outline package; no leads; 8 terminals; body 0 terminal 1 index area terminal 1 index area Dimensions (1) Unit max 0.80 0.05 0.65 mm nom 0.75 0.02 0.55 0.2 min 0.70 0 0.45 Note 1. Dimension A is including plating thickness. The package footprint is compatible with JEDEC MO229 ...

Page 49

... NXP Semiconductors HWSON8: plastic thermal enhanced very very thin small outline package; no leads; 8 terminals; body 0 terminal 1 index area terminal 1 index area Dimensions (1) Unit max 0.80 0.05 0.65 mm nom 0.75 0.02 0.55 0.2 min 0.70 0.00 0.45 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...

Page 50

... NXP Semiconductors 13. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description”. 13.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits ...

Page 51

... NXP Semiconductors 13.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • ...

Page 52

... NXP Semiconductors Fig 46. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. 14. Abbreviations Table 33. Acronym ADC ARA CDM CMOS CPU DDR DIMM DRAM ECC EEPROM ESD HBM 2 I C-bus ...

Page 53

... NXP Semiconductors Table 33. Acronym RDIMM SMBus SO-DIMM SPD 15. Revision history Table 34. Revision history Document ID Release date SE97_7 20100129 • Modifications: Table 1 “Ordering – added Type number SE97TP/S900 – added • Added (new) • Section 7.7 “SMBus 35 ms” to “between 25 ms and 35 ms” ...

Page 54

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 55

... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2.1 General features . . . . . . . . . . . . . . . . . . . . . . . . 2 2.2 Temperature sensor features . . . . . . . . . . . . . . 2 2.3 Serial EEPROM features . . . . . . . . . . . . . . . . . 2 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 5 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6 7 Functional description . . . . . . . . . . . . . . . . . . . 7 7.1 Serial bus interface . . . . . . . . . . . . . . . . . . . . . . 7 7 ...

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