ADT7473ARQZ-1R7 ON Semiconductor, ADT7473ARQZ-1R7 Datasheet

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ADT7473 R dBCOOL Remote Thermal Monitor and Fan Control The ADT7473/ADT7473−1 dBCOOL controller is a thermal monitor and multiple PWM fan controller for noise sensitive or power sensitive applications requiring active system cooling. The ADT7473/ADT7473−1 can drive a fan using ...

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ADT7473/ADT7473−1 PWM1 PWM2 CONTROLLERS PWM3 TACH1 TACH2 TACH3 TACH4 *THERM_LATCH V TO ADT7473/ADT7473− D1+ D1– D2+ D2– V CCP BAND GAP TEMP SENSOR *PIN FUNCTION ONLY AVAILABLE ON THE ADT7473−1 ABSOLUTE MAXIMUM RATINGS Parameter Positive Supply Voltage ...

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ELECTRICAL CHARACTERISTICS Parameter Power Supply Supply Voltage Supply Current Temperature−to−Digital Converter Local Sensor Accuracy Resolution Remote Diode Sensor Accuracy Resolution Remote Sensor Source Current Analog−to−Digital Converter (Including MUX and Attentuators) Total Unadjusted Error (TUE) Differential Nonlinearity (DNL) Power ...

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ELECTRICAL CHARACTERISTICS Parameter Digital Input Logic Levels (THERM) ADTL+ Input High Voltage Input Low Voltage Input High Voltage Input Low Voltage Input Low Current Input Capacitance Serial Bus ...

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PIN ASSIGNMENT Pin No. Mnemonic 1 SCL Digital Input (Open Drain). SMBus serial clock input. Requires SMBus pullup. 2 GND Ground Pin Power Supply. Powered by 3 TACH3 Digital Input (Open Drain). Fan tachometer input ...

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D+ TO GND –20 –40 – LEAKAGE RESISTANCE (MΩ) Figure 3. Remote Temperature Error vs. PCB Resistance Figure 5. Remote Temperature Error vs. Common−Mode ...

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Figure 9. Remote Temperature Error vs. Power Supply Noise Frequency 3.0 2.5 2.0 1.5 1.0 0.5 0 0.5 1.0 1.5 –40 Figure 11. Remote Temperature Error vs. Temperature TYPICAL CHARACTERISTICS 3.0 2.5 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 ...

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Product Description The ADT7473/ADT7473− complete thermal monitor and multiple fan controller for any system requiring thermal monitoring and cooling. The device communicates with the system via a serial system management bus. The serial bus controller has a serial ...

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FRONT CHASSIS FAN REAR CHASSIS FAN AMBIENT TEMPERATURE Serial Bus Interface On PCs and servers, control of the ADT7473/ADT7473−1 is carried out using the SMBus. The ADT7473/ADT7473−1 is connected to this bus as a slave device, under the control of ...

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V CC ADT7473−1 10kΩ 4 ADDR SELECT 8 NC PWM3/ADDREN DO NOT LEAVE ADDREN UNCONNECTED! CAN CAUSE UNPREDICTABLE ADDRESSES. CARE SHOULD BE TAKEN TO ENSURE THAT PIN 8 (PWM3/ADDREN) IS EITHER TIED HIGH OR LOW. LEAVING PIN 8 FLOATING COULD ...

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SCL SDA START BY MASTER FRAME 1 SERIAL BUS ADDRESS BYTE Figure 18. Writing to the Address Pointer Register Only 1 SCL SDA START BY MASTER FRAME 1 SERIAL BUS ADDRESS ...

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Read Operations The ADT7473/ADT7473−1 uses the following SMBus read protocols. Receive Byte This operation is useful when repeatedly reading a single register. The register address must have been previously set up. In this operation, the master device receives a single ...

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Table 5 shows the input ranges of the analog inputs and output codes of the 10−bit ADC. When the ADC is running, it samples and converts a voltage input in 711 ms and averages 16 conversions to reduce noise; a ...

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Table 5. 10−Bit ADC Output Code vs (3 (Note <0.0042 0.0042 to 0.0085 0.0085 to 0.0128 0.0128 to 0.0171 0.0171 to 0.0214 0.0214 to 0.0257 0.0257 to 0.0300 0.0300 to 0.0343 0.0343 to ...

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Local Temperature Measurement The ADT7473/ADT7473−1 contains an on−chip band gap temperature sensor whose output is digitized by the on−chip 10−bit ADC. The 8−bit MSB temperature data is stored in the local temperature register (0x26). Because both positive and negative temperatures ...

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REMOTE SENSING TRANSISTOR D+ D– Figure 24. Signal Conditioning for Remote Diode Temperature Sensors If a discrete transistor is used, the collector is not grounded and should be linked to the base PNP transistor is used, the base ...

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This series resistance appears as a temperature offset in the remote sensor’s temperature measurement. This error typically causes a 0.5°C offset per W of parasitic resistance in series with the remote diode. The ADT7473/ADT7473−1 automatically cancels out the effect ...

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In this mode, the diode fault condition remains −128°C = 1000 0000, while in the extended temperature range (−64°C to +191°C), the fault condition is represented by −64°C = 0000 0000. Temperature Measurement Registers Register ...

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THERM LIMIT TEMPERATURE 100% FANS Figure 28. THERM Limit Operation Limits, Status Registers, and Interrupts Limit Values Associated with each measurement channel on the ADT7473/ADT7473−1 are high and low limits. These can form the basis of system status monitoring; a ...

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The ADT7473/ ADT7473− derivative of the ADT7467 result, the total conversion time in the ADT7473/ ADT7473−1 is the same as the total ...

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Read the status registers to identify the interrupt source. 4. Mask the interrupt source by setting the appropriate mask bit in the interrupt mask registers (Register 0x74 and Register 0x75). 5. Take the appropriate action for a given interrupt ...

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THERM as an Input When THERM is configured as an input, the ADT7473/ADT7473−1 can time assertions on the THERM pin. This can be useful for connecting to the PROCHOT output of a CPU to gauge system performance. See the THERM ...

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SMBALERT if this bit is set to 1; however, the F4P bit of Interrupt Status Register 2 still is set if the THERM timer limit is exceeded. Figure functional block diagram of the THERM timer, limit, and ...

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THERM 364.16ms TIMER LIMIT 182.08ms (REGISTER 0x7A) 91.04ms 45.52ms 22.76ms Figure 33. Functional Block Diagram of the ADT7473 THERM Monitoring Circuitry Configuring the THERM Pin as Bidirectional In addition to monitoring THERM as an input, the ADT7473/ADT7473−1 ...

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Many fans have internal pullups connected to the TACH/PWM pins to a supply greater than 3.6 V. Clamping or dividing down the voltage on these pins must be done where necessary. Clamping these pins with a Zener diode can also ...

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Driving up to Three Fans from PWM3 TACH measurements for fans are synchronized to particular PWM channels; for example, TACH1 is synchronized to PWM1. TACH3 and TACH4 are both synchronized to PWM3, so PWM3 can drive two fans. Alternatively, PWM3 ...

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With a pullup voltage and pullup resistor less than 1 kW, suitable values for R1 and R2 are 120 kW and 47 kW, respectively. This gives a high input voltage of 3.35 V. 12V <1kΩ R1* TACH ...

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For optimal results, the associated dc bit should always be set when using 4−wire fans. Calculating Fan Speed Assuming a fan has two pulses per revolution (and two pulses per revolution being measured), fan ...

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High Frequency Mode PWM Drive Setting Bit 3 of Register 0x5F, 60H or 61H enables high frequency mode for fans 1, 2 and 3. PWM Frequency Registers (Register 0x5F to Register 0x61) Bits [2:0] FREQ 000 = 11.0 Hz 001 ...

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Sleep States The ADT7473/ADT7473−1 has been specifically designed to operate from a 3.3 V STBY supply. In computers that support S3 and S5 states, the core voltage of the processor is lowered in these states. If using the dynamic T ...

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The mechanical or thermal engineer who is tasked with the system thermal characterization should also be involved at the beginning of the process. Automatic Fan Control Overview The ADT7473/ADT7473−1 can automatically control the speed of fans based on the measured ...

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Step 1: Hardware Configuration During system design, the motherboard sensing and control capabilities should be addressed early in the design stages. Decisions about how these capabilities are used should involve the system thermal/mechanical engineer. Consider the following questions: 1. What ...

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Recommended Implementation 1 Configuring the ADT7473 Figure 49 provides the system designer with the following features: • Two PWM outputs for fan control three fans. (The front and rear chassis fans are connected in parallel.) ...

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Step 2: Configuring the Mux After the system hardware configuration is determined, the fans can be assigned to particular temperature channels. Not only can fans be assigned to individual channels, but the behavior of the fans is also configurable. For ...

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Mux Configuration Example This is an example of how to configure the mux in a system using the ADT7473/ADT7473−1 to control three fans. The CPU fan sink is controlled by PWM1, the front chassis fan is controlled by PWM2, and ...

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Step 4: PWM for Each PWM (Fan) Output MIN PWM is the minimum PWM duty cycle at which each MIN fan in the system runs also the start speed for each fan under automatic fan control once the ...

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PWM2 PWM1 PWM2 MIN PWM1 MIN 0% TEMPERATURE T MIN Figure 54. Operating Two Different Fans from a Single Temperature Channel Programming the PWM Registers MIN The PWM registers are 8−bit registers that allow the MIN minimum PWM duty ...

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Step 6: T for Temperature Channels RANGE T is the range of temperature over which automatic RANGE fan control occurs once the programmed T is exceeded temperature slope, not an arbitrary RANGE value, that is ...

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Example 4 Calculate T , given that T MAX MIN 40°C, and PWM = 50% duty cycle = 128 (decimal). MIN (Max DC − Min DC MAX MIN T = 30°C + (100% − ...

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TEMPERATURE ABOVE T MIN 100 TEMPERATURE ABOVE T MIN ...

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T to that limit (for example, 70°C). THERM THERM Registers Register 0x6A, Remote 1 THERM Temperature Limit = 0xA4 (100°C default) Register 0x6B, Local THERM Temperature Limit = 0xA4 (100°C ...

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The T setting applies not only to the temperature HYST hysteresis for fan on/off, but the same setting is used for the T hysteresis value, described in Step 6: T THERM Temperature Channels section. Therefore, programming Register 0x6D and Register ...

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ADT7473/ADT7473−1 to intelligently adapt the system’s cooling solution for best system performance or lowest possible system acoustics, depending on user or design requirements. Use of dynamic T control alleviates the need to design for worst−case conditions and ...

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Getting the most benefit from the automatic fan control mode involves characterizing the system to find the best T and T settings for the control loop, and the best MIN RANGE PWM value for the quietest fan speed setting. Using ...

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Programming Operating Point Registers There are three operating point registers, one for each temperature channel. These 8−bit registers allow the operating point temperatures to be programmed with 1°C resolution. Figure 67. Operating Point Value Dynamically Adjusts Automatic Fan Control Settings ...

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Short Cycle and Long Cycle The ADT7473/ADT7473−1 implements two loops: a short cycle and a long cycle. The short cycle takes place every n monitoring cycles. The long cycle takes place every 2n monitoring cycles. The value ...

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T decreases depends on the programmed value MIN also depends on how much the temperature has increased between this monitoring cycle and the last monitoring cycle; that is, if the temperature has increased by 1°C, ...

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THERM LIMIT OPERATING POINT HYSTERESIS ACTUAL TEMP LOW TEMP LIMIT HIGH TEMP LIMIT T MIN Figure 73. T Adjustments Limited by the High MIN Temperature Limit Step 11: Monitoring THERM Using the operating point limit ensures that the dynamic T ...

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The goal is to implement a system that is acoustically pleasing without causing user annoyance due to fan cycling important to realize that although a system might pass an acoustic ...

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Effect of Ramp Rate on Enhanced Acoustics Mode The PWM signal driving the fan has a period, T, given by the PWM drive frequency, f, because T = 1/f. For a given PWM period, T, the PWM period is subdivided ...

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Another way to view the ramp rates is to measure the time it takes for the PWM output to ramp up from 0% to 100% duty cycle for an instantaneous change in temperature. This can be tested by putting the ...

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PWM DUTY CYCLE (%) (5C) 40 TEMP TIME (s) Figure 81. How Fan Reacts to Temperature Variation in Enhanced Acoustics Mode Figure 81 shows the behavior of the PWM output ...

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Register Tables Table 16. ADT7473/ADT7473−1 Registers Addr R/W Desc Bit 7 0x21 CCP Reading 0x22 Reading 0x25 R Remote 1 9 Temp. 0x26 R Local 9 Temp. 0x27 R Remote 2 9 Temp. ...

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Table 16. ADT7473/ADT7473−1 Registers Addr R/W Desc Bit 7 0x3D R Device ID 7 Register 0x3E R Company 7 ID Number 0x3F R Revision ID 7 Register 0x40 R/W Config. ADT7473: Register 1 RES ADT7473−1: Latch Reset 0x41 R Interrupt ...

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Table 16. ADT7473/ADT7473−1 Registers Addr R/W Desc Bit 7 0x5A R/W TACH4 7 Minimum Low Byte 0x5B R/W TACH4 15 Minimum High Byte 0x5C R/W PWM1 BHVR Config. Register 0x5D R/W PWM2 BHVR Config. Register 0x5E R/W PWM3 BHVR Config. ...

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Table 16. ADT7473/ADT7473−1 Registers Addr R/W Desc Bit 7 0x70 R/W Remote 1 7 Temp. Offset 0x71 R/W Local Temp. 7 Offset 0x72 R/W Remote 2 7 Temp. Offset 0x73 R/W Config. SHDN Register 2 0x74 R/W Interrupt OOL Mask ...

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Table 18. Temperature Reading Registers (Power−On Default = 0x01) Register Address R/W 0x25 Read−only 0x26 Read−only 0x27 Read−only 1. These temperature readings can be in twos complement or Offset 64 format; this interpretation is determined by Bit 0 of Configuration ...

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Table 22. Register 0x36 — Dynamic T Bit No. Mnemonic R/W [0] CYR2 R/W [ R/W CCP [2] PHTR1 R/W [3] PHTL R/W [4] PHTR2 R/W [5] R1T R/W [6] LT R/W [7] R2T R/W 1. This register ...

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Table 23. Register 0x37 — Dynamic T Bit No. Mnemonic R/W [2:0] CYR1 R/W [5:3] CYL R/W [7:6] CYR2 R/W 1. This register becomes read−only when the Configuration Register 1 lock bit is set to 1. Any subsequent attempts to ...

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Table 24. Maximum PWM Duty Cycle Registers (Power−On Default = 0xFF) Register Address R/W (Note 2) 0x38 R/W 0x39 R/W 0x3A R/W 1. These registers set the maximum PWM duty cycle of the PWM output. 2. These registers become read−only ...

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Table 27. Register 0x42 — Interrupt Status Register 2 (Power−On Default = 0x00) Bit No. Mnemonic R/W [0] RES Read−only THERM Limit Latch [1] OVT Read−only [2] FAN1 Read−only [3] FAN2 Read−only [4] FAN3 Read−only [5] F4P Read−only R/W Read−only ...

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Table 30. Fan Tachometer Limit Registers Register Address R/W 0x54 R/W 0x55 R/W 0x56 R/W 0x57 R/W 0x58 R/W 0x59 R/W 0x5A R/W 0x5B R/W 1. Exceeding any of the TACH limit registers by 1 indicates that the fan is ...

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Table 33. Register 0x5C, Register 0x5D, and Register 0x5E — Configuration Registers (ADT7473 Power−On Default = 0x82, ADT7473−1 Power−On Default = 0x62) Bit No. Mnemonic R/W [2:0] SPIN R/W [3] SLOW R/W [4] INV R/W [7:5] BHVR R/W Table 34. ...

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Table 35. Register 0x5F, Register 0x60, and Register 0x61 — TEMP T (Power−On Default = 0xCC) Bit No. Mnemonic R/W [2:0] FREQ R/W [3] HF/LF R/W [7:4] RANGE R/W RANGE Description These bits control the PWMx frequency. Bit Code 000 ...

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Table 36. Register 0x62 — Enhanced Acoustics Register 1 (Power−On Default = 0x00) Bit No. Mnemonic R/W (Note 1) [2:0] ACOU R/W [3] EN1 R/W [4] SYNC R/W [5] MIN1 R/W [6] MIN2 R/W [7] MIN3 R/W 1. This register ...

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Table 37. Register 0x63 — Enhanced Acoustics Register 2 (Power−On Default = 0x00) Bit No. Mnemonic R/W (Note 1) [2:0] ACOU3 R/W [3] EN3 R/W [6:4] ACOU2 R/W [7] EN2 R/W 1. This register becomes read−only when the Configuration Register ...

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Table 41. THERM Limit Registers (Note 1) Register Address R/W (Note 2) 0x6A R/W 0x6B R/W 0x6C R any temperature measured exceeds its THERM limit, all PWM outputs drive their fans at 100% duty cycle. This is a ...

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Table 45. Local Temperature Offset Register (0x71) Register Address R/W (Note 1) [7:0] R/W 1. This register becomes read−only when the Configuration Register 1 lock bit is set to 1. Any further attempts to write to this register have no ...

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Table 48. Register 0x74 — Interrupt Mask Register 1 (Power−On Default = 0x00) Bit No. Mnemonic R/W [1] V R/W CCP [2] V R/W CC [4] R1T R/W [5] LT R/W [6] R2T R/W [7] OOL R/W Table 49. Register ...

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Table 52. Register 0x78 — Configuration Register 3 (Power−On Default = 0x00) Bit No. Mnemonic R/W (Note 1) [0] ALERT R/W Enable [1] THERM R/W [2] BOOST R/W [3] FAST R/W [4] DC1 R/W [5] DC2 R/W [6] DC3 R/W ...

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Table 55. Register 0x7B — TACH Pulses per Revolution Register (Power−On Default = 0x55) Bit No. Mnemonic R/W [1:0] FAN1 R/W [3:2] FAN2 R/W [5:4] FAN3 R/W [7:6] FAN4 R/W Description Sets number of pulses to be counted when measuring ...

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Table 56. Register 0x7C — Configuration Register 5 (ADT7473Power−On Default = 0x00) Bit No. Mnemonic R/W (Note 1) [0] TWOS R/W COMPL [1] Temp Offset [2] GPIOD [3] GPIOP [4] RES R/W THERM Hysteresis [5] R1 THERM R/W [6] Local ...

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... Device Order Number* ADT7473ARQZ ADT7473ARQZ−REEL ADT7473ARQZ−RL7 ADT7473ARQZ−001 ADT7473ARQZ−1RL ADT7473ARQZ−1R7 †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *These are Pb−Free packages. Description Manufacturer’ ...

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... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...