ADT7476ARQZ ON Semiconductor, ADT7476ARQZ Datasheet - Page 54

IC REMOTE THERMAL CTRLR 24QSOP

ADT7476ARQZ

Manufacturer Part Number
ADT7476ARQZ
Description
IC REMOTE THERMAL CTRLR 24QSOP
Manufacturer
ON Semiconductor
Series
dBCool®r
Datasheet

Specifications of ADT7476ARQZ

Function
Fan Control, Temp Monitor
Topology
ADC, Comparator, Fan Speed Counter, Multiplexer, Register Bank
Sensor Type
External & Internal
Sensing Temperature
-40°C ~ 125°C, External Sensor
Output Type
SMBus™
Output Alarm
No
Output Fan
Yes
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
24-QSOP
Full Temp Accuracy
+/- 0.5 C
Digital Output - Bus Interface
Serial (3-Wire, 4-Wire)
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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1. Exceeding any of these temperature limits by 1°C causes the appropriate status bit to be set in the interrupt status register. Setting the
2. High limits: An interrupt is generated when a value exceeds its high limit (> comparison). Low limits: An interrupt is generated when a value
1. Exceeding any of the TACH limit registers by 1 indicates that the fan is running too slowly or has stalled. The appropriate status bit is set
Table 27. Temperature Limit Registers
Table 28. Fan TACH Limit Registers
Table 29. Register 0x55 — TACH1 Minimum High Byte (Power−On Default = 0xFF)
Bit No.
[4:0]
[7:5]
Configuration Register 1 lock bit has no effect on these registers.
is equal to or below its low limit (≤ comparison).
in Interrupt Status Register 2 to indicate the fan failure. Setting the Configuration Register 1 lock bit has no effect on these registers.
Register Address
Register Address
0x4E
0x5A
0x5B
0x4F
0x50
0x51
0x52
0x53
0x54
0x55
0x56
0x57
0x58
0x59
Mnemonic
Reserved
SCADC
Read−only
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Remote 1 temperature low limit.
Remote 1 temperature high limit.
Local temperature low limit.
Local temperature high limit.
Remote 2 temperature low limit.
Remote 2 temperature high limit.
(Note 1)
TACH1 minimum low byte.
TACH1 minimum high byte/single−channel ADC channel select.
TACH2 minimum low byte.
TACH2 minimum high byte.
TACH3 minimum low byte.
TACH3 minimum high byte.
TACH4 minimum low byte.
TACH4 minimum high byte.
When Bit 6 of Configuration 2 Register (0x73) is set (single−channel ADC mode), these bits
are reserved. Otherwise, these bits represent Bits [4:0] of the TACH1 minimum high byte.
When Bit 6 of Configuration 2 Register (0x73) is set (single−channel ADC mode), these bits
are used to select the only channel from which the ADC will take measurements. Otherwise,
these bits represent Bits [7:5] of the TACH1 minimum high byte.
(Note 1)
http://onsemi.com
Description (Note 2)
54
Description
Description
Power−On Default
Power−On Default
0x81
0x7F
0x81
0x7F
0x81
0x7F
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF

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