ADR421ARZ Analog Devices Inc, ADR421ARZ Datasheet - Page 16

• Manufacturer Part Number: ADR421ARZ
• Description: IC REF PREC LONOISE 2.50V 8-SOIC
• Manufacturer: Analog Devices Inc
• Series: XFET®r

Specifications of ADR421ARZ

• Temperature Coefficient: 10ppm/°C
• Design Resources: 40 Channels of Programmable Voltage with Excellent Temperature Drift Performance Using AD5380 (CN0007) 40 Channels of Programmable Voltage with Excellent Temperature Drift Performance Using AD5381 (CN0010) 32 Channels of Programmable Voltage with Excellent Temperature Drift Performance Using AD5382 (CN0011) 32 Channels of Programmable Voltage with Excellent Temperature Drift Performance Using AD5383 (CN0014) 8 to 16 Channels of Programmable Voltage with Excellent Temperature Drift Performance Using AD5390/1/2 (CN0029) High Precision Digital-to-Analog Conversion Using the 16-Bit AD5542/1, ADR421, and AD8628 (CN0079) 16 Channels of Programmable Output Span Using AD5360 (CN0131) Layout Considerations for an Expandable Multichannel Simultaneous Sampling Data Acquisition System Based on AD7606 (CN0148) 40 Channels of Programmable Output Span Using AD5371 (CN0149) Software Calibrated, 1 MHz to 8 GHz, 70 dB RF Power Measurement System Using AD8318 (CN0150) How to Achieve High Precision Voltage Level Setting Using AD5541A/42A (CN0169)
• Reference Type: Series
• Voltage - Output: 2.5V
• Tolerance: ±0.12%
• Voltage - Input: 4.5 ~ 18 V
• Number Of Channels: 1
• Current - Quiescent: 500µA
• Current - Output: 10mA
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Topology: Series
• Input Voltage: 4.5V To 18V
• Reference Voltage: 2.5V
• Reference Voltage Tolerance: 3mV
• Voltage Reference Case Style: SOIC
• No. Of Pins: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Cathode: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

ADR420/ADR421/ADR423/ADR425
THEORY OF OPERATION
The ADR42x series of references uses a reference generation
technique known as XFET (eXtra implanted junction FET).
This technique yields a reference with low supply current, good
thermal hysteresis, and exceptionally low noise. The core of the
XFET reference consists of two junction field-effect transistors
(JFET), one having an extra channel implant to raise its pinch-
off voltage. By running the two JFETs at the same drain current,
the difference in pinch-off voltage can be amplified and used to
form a highly stable voltage reference.
The intrinsic reference voltage is about 0.5 V with a negative
temperature coefficient of about −120 ppm/°C. This slope is
essentially constant to the dielectric constant of silicon and can
be closely compensated by adding a correction term generated
in the same fashion as the proportional-to-temperature (PTAT)
term used to compensate band gap references. The primary
advantage over a band gap reference is that the intrinsic tem-
perature coefficient is approximately 30 times lower (therefore
requiring less correction). This results in much lower noise
because most of the noise of a band gap reference comes from
the temperature compensation circuitry.
Figure 38 shows the basic topology of the ADR42x series. The
temperature correction term is provided by a current source
with a value designed to be proportional to absolute tempera-
ture. The general equation is
where:
G is the gain of the reciprocal of the divider ratio.
ΔV
I
Each ADR42x device is created by on-chip adjustment of R2
and R3 to achieve the specified reference output.
PTAT
P
is the difference in pinch-off voltage between the two JFETs.
is the positive temperature coefficient correction current.
V
OUT
I
PTAT
= G × (ΔV
*EXTRA CHANNEL IMPLANT
V
OUT
*
I
1
= G(ΔV
Figure 38. Simplified Schematic
P
− R1 × I
P
I
– R1 × I
1
ΔV
P
PTAT
PTAT
R1
)
)
ADR420/ADR421/
ADR423/ADR425
R2
R3
GND
V
V
IN
OUT
Rev. H | Page 16 of 24
(1)
DEVICE POWER DISSIPATION CONSIDERATIONS
The ADR42x family of references is guaranteed to deliver load
currents to 10 mA with an input voltage that ranges from 4.5 V
to 18 V. When these devices are used in applications at higher
currents, the following equation should be used to account for
the temperature effects due to power dissipation increases:
where:
T
temperature, respectively.
P
θ
BASIC VOLTAGE REFERENCE CONNECTIONS
Voltage references, in general, require a bypass capacitor
connected from V
illustrates the basic configuration for the ADR42x family of
references. Other than a 0.1 μF capacitor at the output to help
improve noise suppression, a large output capacitor at the
output is not required for circuit stability.
NOISE PERFORMANCE
The noise generated by ADR42x references is typically less
than 2 μV p-p over the 0.1 Hz to 10 Hz band for the ADR420,
ADR421, and ADR423. Figure 24 shows the 0.1 Hz to 10 Hz
noise of the ADR421, which is only 1.75 μV p-p. The noise
measurement is made with a band-pass filter made of a 2-pole
high-pass filter with a corner frequency at 0.1 Hz and a 2-pole
low-pass filter with a corner frequency at 10 Hz.
TURN-ON TIME
At power-up (cold start), the time required for the output
voltage to reach its final value within a specified error band
is defined as the turn-on settling time. Two components typi-
cally associated with this are the time for the active circuits to
settle and the time for the thermal gradients on the chip to
stabilize. Figure 31 to Figure 35 show the turn-on settling time
for the ADR421.
JA
D
J
and T
is the device power dissipation.
is the device package thermal resistance.
T
J
V
= P
IN
10µF
A
are the junction temperature and the ambient
D
Figure 39. Basic Voltage Reference Configuration
× θ
+
JA
0.1µF
+ T
OUT
TP = TEST PIN (DO NOT CONNECT)
A
NIC = NO INTERNAL CONNECTION
to GND. The circuit in Figure 39
NIC
TP
1
2
3
4
(Not to Scale)
ADR420/
ADR421/
ADR423/
ADR425
TOP VIEW
8
7
6
5
TP
NIC
OUTPUT
TRIM
0.1µF
(2)