ISL6540ACRZ-T Intersil, ISL6540ACRZ-T Datasheet

IC CTLR PWM BUCK 1PHASE 28-QFN

ISL6540ACRZ-T

Manufacturer Part Number
ISL6540ACRZ-T
Description
IC CTLR PWM BUCK 1PHASE 28-QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL6540ACRZ-T

Pwm Type
Voltage Mode
Number Of Outputs
1
Frequency - Max
2MHz
Duty Cycle
100%
Voltage - Supply
2.97 V ~ 22 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
0°C ~ 70°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Frequency-max
2MHz
Rohs Compliant
YES
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ISL6540ACRZ-T
Single-Phase Buck PWM Controller with
Integrated High Speed MOSFET Driver
and Pre-Biased Load Capability
The ISL6540A is an improved version of the ISL6540
single-phase voltage-mode PWM controller with input voltage
feed-forward compensation to maintain a constant loop gain for
optimal transient response, especially for applications with a
wide input voltage range. Its integrated high speed
synchronous rectified MOSFET drivers and other sophisticated
features provide complete control and protection for a DC/DC
converter with minimum external components, resulting in
minimum cost and less engineering design efforts.
The output voltage of the converter can be precisely regulated
with an internal reference voltage of 0.591V, and has an
improved system tolerance of ±0.68% over commercial
temperature and line load variations. An external voltage can
be used in place of the internal reference for voltage
tracking/DDR applications.
The ISL6540A has an internal linear regulator or external linear
regulator drive options for applications with only a single supply
rail. The internal oscillator is adjustable from 250kHz to 2MHz.
The integrated voltage margining, programmable pre-biased
soft-start, differential remote sensing amplifier, and
programmable input voltage POR features enhance the
ISL6540A value.
Pinout
REFOUT
VSEN+
VSEN-
REFIN
OFS+
OFS-
SS
1
2
3
4
5
6
7
28
8
27
9
(28 LD 5x5 QFN)
10
26
TOP VIEW
ISL6540A
SIDE PAD
BOTTOM
®
GND
11
25
1
12
24
Data Sheet
13
23
14
22
21
20
19
18
17
16
15
BOOT
UGATE
PHASE
PGND
LGATE
PVCC
LINDRV
1-888-INTERSIL or 1-888-468-3774
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Features
• VIN and Power Rail Operation from +3.3V to +20V
• Fast Transient Response - 0 to 100% Duty Cycle
• 2.9V to 5.5V High Speed 2A/4A MOSFET Gate Drivers
• Internal Linear Regulator (LR) - 5.5V Bias from VIN
• External LR Drive for Optimal Thermal Performance
• Voltage Margining with Independently Adjustable Upper and
• Reference Voltage I/O for DDR/Tracking Applications
• Improved 0.591V Internal Reference with Buffered Output
• Source and Sink Overcurrent Protections
• Overvoltage and Undervoltage Protections
• Small Converter Size - QFN package
• Oscillator Programmable from 250kHz to 2MHz
• Differential Remote Voltage Sensing with Unity Gain
• Programmable Soft-Start with Pre-Biased Load Capability
• Power-Good Indication with Programmable Delay
• EN Input with Voltage Monitoring Capability
• Pb-Free (RoHS Compliant)
Applications
• Power Supply for some Microprocessors and GPUs
• Wide and Narrow Input Voltage Range Buck Regulators
• Point of Load Applications
• Low-Voltage and High Current Distributed Power Supplies
Ordering Information
*Add “-T” suffix for tape and reel. Please refer to TB347 for details on
reel specifications.
These Intersil Pb-free plastic packaged products employ special Pb-
free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS
compliant and compatible with both SnPb and Pb-free soldering
operations). Intersil Pb-free products are MSL classified at Pb-free
peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J STD-020.
ISL6540ACRZ* ISL6540 ACRZ
ISL6540AIRZ*
ISL6540AIRZA* ISL6540 AIRZ
- 15MHz Bandwidth Error Amplifier with 6V/µs Slew Rate
- Voltage-Mode PWM Leading and Trailing-Edge
- Input Voltage Feedforward Compensation
- Tri-state for Power Stage Shutdown
Lower Settings for System Stress Testing and Over Clocking
- ±0.68%/±1.0% Over Commercial/Industrial Range
- Low-and High-Side MOSFET r
NUMBER*
October 7, 2008
Modulation Control
(Note)
PART
All other trademarks mentioned are the property of their respective owners.
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2006 - 2008. All Rights Reserved
ISL6540 AIRZ
MARKING
PART
-40 to +85 28 Ld 5x5 QFN L28.5x5
-40 to +85 28 Ld 5x5 QFN L28.5x5
RANGE
0 to +70 28 Ld 5x5 QFN L28.5x5
TEMP.
(°C)
DS(ON)
ISL6540A
PACKAGE
(Pb-Free)
Sensing
FN6288.5
DWG. #
PKG.

Related parts for ISL6540ACRZ-T

ISL6540ACRZ-T Summary of contents

Page 1

... Low-Voltage and High Current Distributed Power Supplies 22 Ordering Information 21 BOOT PART NUMBER* 20 UGATE (Note) 19 PHASE ISL6540ACRZ* ISL6540 ACRZ PGND 18 ISL6540AIRZ* 17 LGATE ISL6540AIRZA* ISL6540 AIRZ PVCC 16 *Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel specifications. LINDRV ...

Page 2

Block Diagram REFIN REFOUT MAR_CTRL OFS+ VOLTAGE MARGINING OFS- OTA SS FB COMP VCC 1.8V PGOOD COMP VSEN+ VSEN UNITY GAIN DIFF AMP VMON PG_DLY EN VCC POWER-ON REFERENCE RESET (POR 0.591 V REF SOFT-START ...

Page 3

Typical Application I (Internal Linear Regulator with Remote Sense VIN * C F1 VIN INTERNAL 5.6V BIAS R VFF LINEAR REGULATOR VFF VFF EN VCC REFIN REFOUT PG C PG_DLY PG_DLY ...

Page 4

Typical Application II (External Linear Regulator without Remote Sense DRV VIN LINDRV VIN VFF VFF C VFF REFOUT VCC REFIN 1kΩ PG_DLY PG_DLY ...

Page 5

Typical Application III (Dual Data Rate I or II) VDDQ 1. VFF R EN1 C ENABLE VFF VIN 1kΩ VFF EN2 1k REFIN REFOUT 15nF DIMM PG_DLY PG_DLY R ...

Page 6

... ISL6540A Thermal Information Thermal Resistance (Notes 1, 2) QFN Package . . . . . . . . . . . . . . . . . Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . +150°C Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150° -0. (DC) Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp - 0.3V BOOT + 0.3V BOOT Recommended Operating Conditions - 0.3V (DC BOOT Input Voltage, VIN, VFF . . . . . . . . . . . . . . . . . . . . 3.3V to 20V ±10% BOOT Driver Bias Voltage, PVCC ...

Page 7

Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. Parts are 100% tested at +25°C. Temperature limits established by characterization and are not production tested. (Continued) SYMBOL PARAMETER OSCILLATOR OSC Nominal Maximum Frequency FMAX OSC Nominal Minimum Frequency FMIN ΔOSC Total ...

Page 8

Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. Parts are 100% tested at +25°C. Temperature limits established by characterization and are not production tested. (Continued) SYMBOL PARAMETER VIN Maximum VIN DV/DT DV/DT_Max EXTERNAL LINEAR REGULATOR LIN_DRV Maximum Sinking Drive Current ...

Page 9

Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. Parts are 100% tested at +25°C. Temperature limits established by characterization and are not production tested. (Continued) SYMBOL PARAMETER V PGOOD Delay Threshold Voltage PG_DLY I PGOOD Low Output Voltage PG_LOW I ...

Page 10

It is recommended that a 1kΩ resistor be placed in series with this pin. VFF (Pin 13) The voltage at this pin is used for input voltage feed-forward compensation and ...

Page 11

OV/UV/PGOOD comparators. The VMON pin should be connected to the FB pin by a standard feedback network. In the event of the remote sense buffer is disabled, the VMON pin should be connected to VOUT by a resistor divider along ...

Page 12

Power-Good The power-good comparator references the voltage on the soft-start pin to prevent accidental tripping during margining. The trip points are shown in Figure 3. Additionally, power-good will not be asserted until after the completion of the soft-start cycle. A ...

Page 13

MOSFETs r and system noise. To avoid overcurrent tripping in the normal operating load range, find the R resistor from the previous detailed equations with: 1. Maximum r at the highest junction temperature. DS(ON) ...

Page 14

... High Speed MOSFET Gate Driver The integrated driver has similar drive capability and features to Intersil's ISL6605 stand alone gate driver. The PWM tri-state feature helps prevent a negative transient on the output voltage when the output is being shut down. This ...

Page 15

VOUT (LOCAL) GND (LOCAL) VCC 1.8V FIGURE 6. SIMPLIFIED UNITY GAIN DIFFERENITAL SENSING IMPLEMENTATION Internal Reference and System Accuracy The internal reference is trimmed to 0.591V. The total DC system accuracy of the system is within ±0.68% over commercial temperature ...

Page 16

Equally important are the connections of the internal gate drives (UGATE, LGATE, PHASE, PGND, BOOT): since they drive the power train MOSFETs using short, high current ...

Page 17

TO +20V VIN ( VCC VIN INTERNAL BIAS R LINEAR REGULATOR VFF VFF ( VFF VCC EN REFIN REFOUT PG C PG_DLY ISL6540A PG_DLY MARCTRL R OFS+ OFS+ ...

Page 18

COMP - FB + E/A VREF VMON - VSEN- + VSEN+ OSCILLATOR V OSC PWM CIRCUIT UGATE HALF-BRIDGE DRIVE PHASE LGATE ISL6540A EXTERNAL CIRCUIT FIGURE 9. VOLTAGE-MODE BUCK CONVERTER COMPENSATION DESIGN Figure 9 highlights ...

Page 19

R 1 --------------------- - ----------- - 1 – ------------------------------------------------ - = ⋅ ⋅ ⋅ 3 2π recommended that a mathematical model is used to ...

Page 20

However, the equivalent series inductance (ESL) of these capacitors increases with case size and can reduce the usefulness of the capacitor to high slew-rate transient loading. Unfortunately, ESL is not a specified parameter. Work with your capacitor supplier and measure ...

Page 21

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

Page 22

Package Outline Drawing L28.5x5 28 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 2, 10/07 5.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( 4. 65 TYP ) ( 3. 10) TYPICAL RECOMMENDED LAND PATTERN 22 ISL6540A A B ...

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