NCP1562ADBR2G ON Semiconductor, NCP1562ADBR2G Datasheet
NCP1562ADBR2G
Specifications of NCP1562ADBR2G
NCP1562ADBR2GOSTR
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NCP1562ADBR2G Summary of contents
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NCP1562A, NCP1562B High Performance Active Clamp/Reset PWM Controller The NCP1562x is a family of voltage mode controllers designed for dc converters requiring high- - efficiency and low parts count. These controllers incorporate two in phase outputs with an ...
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Disable start I inhibit 16 V AUX C AUX + + -- V / AUX(on AUX(off1) V AUX(off2 UVOV UVOV R2 Detector V ref Oscillator 500 ...
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PIN FUNCTION DESCRIPTION Pin Symbol 1 V Connect the input line voltage directly to this pin to enable the internal startup regulator. A constant in current source supplies current from this pin to the capacitor connected to the V need ...
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PIN FUNCTION DESCRIPTION (continued) Pin Symbol 15 OUT1 Main output of the PWM Controller. OUT1 has a source resistance of 4.0 Ω (typ.) and a sink resistance of 2.5 Ω (typ.). OUT1 is designed to handle up to 2.5 A. ...
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MAXIMUM RATINGS (Notes 1 and 2) Line Voltage Auxiliary Supply, OUT1, OUT2 All Other Inputs/Outputs Voltage All Other Inputs/Outputs Current 5.0 V Reference Output Current 5.0 V Reference Output Voltage OUT1 Peak Output Current (D = 2%) OUT2 Peak Output ...
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ELECTRICAL CHARACTERISTICS R = 13.3 kΩ mF 470 pF AUX 0.1 mF 29.4 kΩ 470 pF. For typical values T REF FF FF Characteristic STARTUP CONTROL ...
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ELECTRICAL CHARACTERISTICS open 13.3 kΩ AUX kΩ 5.0 kΩ 0.1 mF SYNC REF 125C, unless otherwise noted.) Characteristic CURRENT ...
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ELECTRICAL CHARACTERISTICS open 13.3 kΩ AUX kΩ 5.0 kΩ 0.1 mF SYNC REF 125C, unless otherwise noted.) Characteristic SYNCHRONIZATION ...
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T , JUNCTION TEMPERATURE (C) J Figure 2. Startup Circuit Inhibit Voltage Threshold vs. Junction Temperature ...
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UVOV out1 out2 2 UVOV UVOV -50 - -25 ...
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FF- -Offset 200 175 150 SS Reset 125 100 - JUNCTION TEMPERATURE (C) J Figure 13. FF Offset and SS Reset Voltages vs. Junction Temperature ...
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V 130 120 110 100 - JUNCTION TEMPERATURE (C) J Figure 18. Cycle Skip Charge Current vs. Junction Temperature 3.5 3.4 3.3 3.2 3.1 ...
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C = 150 pF T 600 500 C = 220 pF T 400 300 200 100 C = 470 TIMING RESISTOR (kΩ) T Figure 24. Oscillator Frequency vs. ...
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AUX SOURCE out1 SINK out1 - JUNCTION TEMPERATURE ...
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The NCP1562x is a family of voltage mode controllers designed for dc converters requiring high- - efficiency and low parts count. These controllers incorporate two in phase outputs with an adjustable overlap delay. The main output is designed ...
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Ramp Figure 36. Soft- -Stop Behavior After Soft- -Start is Complete and the voltage on the V pin reaches V AUX immediately discharged and ...
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... C CSKIP Figure 38. External Latch Implemented using ON Semiconductor’s MiniGatet Buffer The latch in Figure 38 consists of a TTL level tri- - state output buffer from ON Semiconductor’s MiniGatet family. The enable (OE) and output (OUTY) terminals are connected to CSKIP and the V CC connected The output of the buffer high REF impedance mode when OE is low ...
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V AUX(on) V AUX(off1) V AUX V inhibit V UVOV V REF out1 The startup regulator is disabled by biasing This feature allows the NCP1562 to operate from AUX(on) an independent 12 V supply. ...
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This architecture allows both the UV and OV levels to be set independently. Both the UV and OV detectors have a 100 mV hysteresis. The line voltage is sampled using a resistor divider as shown in Figure 42. ...
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The minimum value determined by the FF FF Ramp discharge current (I ). The current through R FF( should be at least ten times smaller than I RFF sharp FF Ramp transition. Equations 3 and ...
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The output overlap delay is adjusted by connecting a resistor from the t pin to ground. The overlap delay proportional minimum delay obtained by grounding the ...
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... UV fault is still present. If the UV fault is removed before soft- - stop is complete, the reference is not disabled. Application Information C Ramp ON Semiconductor provides an electronic design tool demonstration board and an application note to facilitate design of the NCP1562 and reduce development cycle time. All the tools can be downloaded or ordered at www ...
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Figure 51. Circuit Schematic ...
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... ORDERING INFORMATION Device NCP1562ADBR2G NCP1562BDBR2G NCP1562ADR2G NCP1562BDR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Package Current Limit TSSOP- -16 200 mV (Pb- -Free) TSSOP- -16 500 mV (Pb- -Free) SO- -16 ...
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... L PIN 1 IDENT. 1 0.15 (0.006 0.10 (0.004 SEATING D PLANE 16X 0.36 *For additional information on our Pb- -Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS TSSOP- -16 CASE 948F--01 ISSUE SECTION 0.25 (0.010 ...
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... *For additional information on our Pb- -Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “ ...