ISL6524ACB-T Intersil, ISL6524ACB-T Datasheet

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ISL6524ACB-T

Manufacturer Part Number
ISL6524ACB-T
Description
IC CTRLR VRM8.5 PWM TRPL 28-SOIC
Manufacturer
Intersil
Datasheet

Specifications of ISL6524ACB-T

Pwm Type
Voltage Mode
Number Of Outputs
4
Frequency - Max
215kHz
Duty Cycle
100%
Voltage - Supply
10.8 V ~ 13.2 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
0°C ~ 70°C
Package / Case
28-SOIC (7.5mm Width)
Frequency-max
215kHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
VRM8.5 PWM and Triple Linear Power
System Controller
The ISL6524A provides the power control and protection for
four output voltages in high-performance microprocessor and
computer applications. The IC integrates one PWM controller
and three linear controllers, as well as the monitoring and
protection functions into a 28-pin SOIC package. The PWM
controller regulates the microprocessor core voltage with a
synchronous-rectified buck converter. One linear controller
supplies the computer system’s AGTL+ 1.2V bus power. The
other two linear controllers regulate power for the 1.5V AGP
bus and the 1.8V power for the chipset core voltage and/or
cache memory circuits.
The ISL6524A includes an Intel VRM8.5 compatible, TTL
5-input digital-to-analog converter (DAC) that adjusts the
microprocessor core-targeted PWM output voltage from
1.050V to 1.825V in 25mV steps. The precision reference and
voltage-mode control provide ±1% static regulation. The linear
regulators use external N-channel MOSFETs or bipolar NPN
pass transistors to provide fixed output voltages of 1.2V ±3%
(V
The ISL6524A monitors all the output voltages. A delayed-
rising VTT (V
before the core PWM starts to ramp up. Another system
Power Good signal is issued when the core is within ±10% of
the DAC setting and all other outputs are above their under-
voltage levels. Additional built-in over-voltage protection for
the core output uses the lower MOSFET to prevent output
voltages above 115% of the DAC setting. The PWM
controllers’ over-current function monitors the output current
by using the voltage drop across the upper MOSFET’s
r
Ordering Information
DS(ON)
ISL6524ACB*
ISL6524ACBZ* (Note)
ISL6524ACBZA-T (Note)
ISL6524EVAL1
*Add “-T” suffix for tape and reel.
NOTE: Intersil Pb-free products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with
both SnPb and Pb-free soldering operations. Intersil Pb-free products
are MSL classified at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J STD-020.
OUT2
PART NUMBER
), 1.5V ±3% (V
, eliminating the need for a current sensing resistor.
OUT2
output) Power Good signal is issued
OUT3
Evaluation Board
RANGE
0 to 70
0 to 70
0 to 70
TEMP.
(°C)
®
) and 1.8V ±3% (V
1
28 Ld SOIC
28 Ld SOIC (Pb-free) M28.3
28 Ld SOIC (Pb-free) M28.3
Data Sheet
PACKAGE
OUT4
).
1-888-INTERSIL or 1-888-352-6832
M28.3
DWG.
PKG.
#
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Features
• Provides 4 Regulated Voltages
• Drives N-Channel MOSFETs
• Linear Regulator Drives Compatible with both MOSFET
• Simple Single-Loop Control Design
• Fast PWM Converter Transient Response
• Excellent Output Voltage Regulation
• VRM8.5 TTL-Compatible 5-Bit DAC Microprocessor Core
• Power-Good Output Voltage Monitors
• Over-Voltage and Over-Current Fault Monitors
• Small Converter Size
• Pb-Free Available (RoHS Compliant)
Applications
• Motherboard Power Regulation for Computers
Pinout
- Microprocessor Core, AGTL+ Bus, AGP Bus Power,
and Bipolar Series Pass Transistors
- Voltage-Mode PWM Control
- High-Bandwidth Error Amplifier
- Full 0% to 100% Duty Ratio
- Core PWM Output: ±1% Over Temperature
- All Other Outputs: ±3% Over Temperature
Output Voltage Selection
- Wide Range - 1.050V to 1.825V
- Separate delayed VTT Power Good
- Switching Regulator Doesn’t Require Extra Current
- Constant Frequency Operation
- 200kHz Internal Oscillator
and North/South Bridge Core
Sensing Element, Uses MOSFET’s r
All other trademarks mentioned are the property of their respective owners.
April 8, 2005
|
FAULT/RT
Intersil (and design) is a registered trademark of Intersil Americas Inc.
PGOOD
DRIVE2
VTTPG
VSEN2
VSEN4
VID25
SS24
SS13
VID3
VID2
VID1
VID0
Copyright Intersil Americas Inc. 2002, 2005. All Rights Reserved
FIX
ISL6524A (SOIC) TOP VIEW
10
11
12
13
14
1
2
3
4
5
6
7
8
9
28
27
26
25
24
23
22
21
20
19
18
17
16
15
ISL6524A
DS(ON)
VCC
UGATE
PHASE
LGATE
PGND
OCSET
VSEN1
FB
COMP
VSEN3
DRIVE3
GND
VAUX
DRIVE4
FN9064.1

Related parts for ISL6524ACB-T

ISL6524ACB-T Summary of contents

Page 1

... PACKAGE ISL6524ACB SOIC ISL6524ACBZ* (Note SOIC (Pb-free) M28.3 ISL6524ACBZA-T (Note SOIC (Pb-free) M28.3 ISL6524EVAL1 Evaluation Board *Add “-T” suffix for tape and reel. NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...

Page 2

VSEN3 1.5V or 1.26V VAUX EA3 - DRIVE3 + x0.75 x0.75 + DRIVE4 - EA4 + 1.8V or 1.26V VSEN4 - FIX INHIBIT DRIVE2 VSEN2 - + EA2 UV2 - + x0.90 + SET 1. OSCILLATOR CLK > ...

Page 3

IN V OUT2 +3. OUT3 +12V IN + OUT2 1.2V C OUT2 VTT POWERGOOD +3. OUT3 1.5V C OUT3 Q5 V OUT4 1.8V C OUT4 3 ...

Page 4

Absolute Maximum Ratings Supply Voltage .+15V CC ...

Page 5

Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. Refer to Figures 1, 2 and 3 (Continued) PARAMETER PWM CONTROLLERS GATE DRIVERS UGATE Source UGATE Sink LGATE Source LGATE Sink PROTECTION VSEN1 Over-Voltage (VSEN1/DACOUT) FAULT Sourcing Current OCSET Current Source Soft-Start ...

Page 6

Functional Pin Descriptions VCC (Pin 28) Provide a 12V bias supply for the IC to this pin. This pin also provides the gate bias charge for all the MOSFETs controlled by the IC. The voltage at this pin is monitored ...

Page 7

This way, the output voltage of the two regulators can be adjusted from 1.26V up to the input voltage (+3.3V or +5V; VOUT4 can only be set from 1.7V up) by way of an external resistor divider connected at the ...

Page 8

ATX 12V 10V VTTPG SS13 ATX 5V SS24 PGOOD 0V 3.0V ATX 3.3V V (1.8V) OUT4 V (1.5V) OUT3 TIME FIGURE 6. SOFT-START INTERVAL The time interval is dependent upon ...

Page 9

OC1 comparator trips when the voltage across exceeds the level programmed by R DS(ON) inhibits outputs 1, 2, and 3, discharges the soft-start capacitor C with 28µA current sink, ...

Page 10

TABLE 1. OUT1 OUTPUT VOLTAGE PROGRAM PIN NAME VID3 VID2 VID1 VID0 ...

Page 11

Dedicate another solid layer as a power plane and break this plane into smaller islands of common voltage levels. The power plane should support the input power and output power nodes. Use ...

Page 12

Compensation Break Frequency Equations 1 ----------------------------------- × × 2π ------------------------------------------------------ - × × 2π Figure 12 shows an ...

Page 13

During this interval the difference between the inductor current and the transient current level must be supplied by the output capacitor(s). Minimizing the ...

Page 14

OR LESS +12V VCC ISL6524A Q1 UGATE PHASE LGATE PGND GND FIGURE 13. UPPER GATE DRIVE - DIRECT V 14 Linear Controllers Transistor Selection The ISL6524A linear controllers are compatible with both NPN bipolar as well ...

Page 15

... OUT4 +1.8V + C20 560µF 15 and +12VDC. For detailed information on the circuit, including a Bill-of-Materials and circuit board description, see ), the GTL Application Note AN9925. Also see the Intersil web site at OUT1 ), and the www.intersil.com OUT3 ) from +3.3V, +5VDC, L1 1µ 680µ ...

Page 16

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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