ISL6526CR Intersil, ISL6526CR Datasheet - Page 6

• Manufacturer Part Number: ISL6526CR
• Description: IC CTRLR PWM SYNC BUCK 16-QFN
• Manufacturer: Intersil

Specifications of ISL6526CR

• Pwm Type: Voltage Mode
• Number Of Outputs: 1
• Frequency - Max: 325kHz
• Duty Cycle: 100%
• Voltage - Supply: 2.97 V ~ 3.63 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 16-VQFN Exposed Pad, 16-HVQFN, 16-SQFN, 16-DHVQFN
• Frequency-max: 325kHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Electrical Specifications
NOTE:
Functional Pin Description
VCC
This pin provides the bias supply for the ISL6526, ISL6526A.
Connect a well-decoupled 3.3V supply to this pin.
COMP and FB
COMP and FB are the available external pins of the error
amplifier. The FB pin is the inverting input of the internal
error amplifier and the COMP pin is the error amplifier
output. These pins are used to compensate the voltage
control feedback loop of the converter.
GATE DRIVERS
Upper Gate Source Current
Upper Gate Sink Current
Lower Gate Source Current
Lower Gate Sink Current
PROTECTION/DISABLE
OCSET Current Source
Disable Threshold
4. Limits should be considered typical and are not production tested.
CPVOUT
OCSET
PARAMETER
CPVOUT
CT1
CT2
OCSET
LGATE
GND
CT1
CT2
FB
1
2
3
4
1
2
3
4
5
6
7
16
16 LD 5X5 QFN
5
14 LD SOIC
TOP VIEW
TOP VIEW
15
6
6
Recommended Operating Conditions, unless otherwise noted V
14
7
13
8
I
I
14
13
12
11
10
I
I
9
8
UGATE-SRC
UGATE-SNK
LGATE-SRC
LGATE-SNK
V
SYMBOL
I
DISABLE
OCSET
UGATE
BOOT
PHASE
VCC
CPGND
ENABLE
COMP
12
11
10
9
PHASE
VCC
CPGND
NC
V
V
Commercial
Industrial
BOOT
VCC
ISL6526, ISL6526A
= 3.3V, V
- V
PHASE
TEST CONDITIONS
LGATE
= 5V, V
GND
This pin represents the signal and power ground for the IC.
Tie this pin to the ground island/plane through the lowest
impedance connection available.
PHASE
Connect this pin to the upper MOSFET’s source. This pin is
used to monitor the voltage drop across the upper MOSFET
for overcurrent protection.
UGATE
Connect this pin to the upper MOSFET’s gate. This pin
provides the PWM-controlled gate drive for the upper
MOSFET. This pin is also monitored by the adaptive
shoot-through protection circuitry to determine when the
upper MOSFET has turned off.
BOOT
This pin provides ground referenced bias voltage to the
upper MOSFET driver. A bootstrap circuit is used to create a
voltage suitable to drive a logic-level N-Channel MOSFET.
LGATE
Connect this pin to the lower MOSFET’s gate. This pin provides
the PWM-controlled gate drive for the lower MOSFET. This pin
is also monitored by the adaptive shoot-through protection
circuitry to determine when the lower MOSFET has turned off.
OCSET
Connect a resistor (R
upper MOSFET (V
source (I
(r
according Equation 1:
An overcurrent trip cycles the soft-start function.
= 4V
I
DS(ON)
PEAK
UGATE
=
OCSET
) set the converter overcurrent (OC) trip point
= 4V
I
-------------------------------------------------
OCSET
r
DS ON
), and the upper MOSFET ON-resistance
xR
(
IN
CC
OCSET
). R
OCSET
)
= 3.3V ±5% and T
MIN
18
16
OCSET
-
-
-
-
-
) from this pin to the drain of the
, an internal 20µA current
TYP
20
20
-1
-1
1
2
-
A
= +25°C. (Continued)
MAX
0.8
22
22
-
-
-
-
November 24, 2008
UNITS
FN9055.10
µA
µA
(EQ. 1)
A
A
A
A
V